Principal CPU Microarchitect - RISC-V & AI Compute

<div class="content-intro"><p>Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.</p></div><p>Our Tensix Team is building the future of AI compute with a ground-up architecture centered on scalable RISC-V processors. As we push performance boundaries, we’re reimagining the frontend of our RISC-V cores to deliver major gains in programmability, efficiency, and developer experience. This is a rare opportunity to shape the CPU architecture at the heart of our AI platform and lead one of the most strategic technical efforts at Tenstorrent.</p> <p>This role is hybrid, based out of Toronto, ON, Austin, TX or Santa Clara, CA.</p> <p>We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.</p> <p>&nbsp;</p> <p><strong>Who You Are</strong></p> <ul> <li><strong>Experienced Microarchitect: </strong>10+ years of deep expertise in CPU performance modeling and microarchitecture design.</li> <li><strong>AI Workload Expert: </strong>Deeply familiar with the computational and memory bottlenecks of modern AI workloads, particularly Large Language Models (LLMs).</li> <li><strong>Hardware-Software Co-Designer: </strong>Driven to architect custom instruction set extensions and validate their performance gains against real-world workloads.</li> <li><strong>Ways to stand-out: </strong>Familiarity with open-source RISC-V cores, AI-based agentic workflow experience</li> </ul> <p>&nbsp;</p> <p><strong>What We Need</strong></p> <ul> <li><strong>Profile &amp; Analyze:</strong> Dissect cutting-edge AI workloads to identify execution bottlenecks and translate those insights into definitive CPU performance requirements.</li> <li><strong>Architect High-Performance Cores:</strong> Drive the microarchitecture of custom RISC-V CPU cores, balancing aggressive Performance, Power, and Area (PPA) targets.</li> <li><strong>Innovate the ISA: </strong>Design and implement custom instructions that unlock massive performance gains