Sr. FPGA Design Engineer

Introduction  

The FPGA Firmware Engineer will work with a team of specialists who will be responsible for developing, testing, and supporting electronics boards or sub-systems.  The engineer will be responsible for definition, design, verification and documentation for FPGA’s (Field Programmable Gate Arrays). They will provide RTL design, simulation, physical implementation and verification of complex FPGA modules comprising a mix of custom RTL with hard and soft vendor IP cores within a larger architecture. 

Role and responsibilities

• Determine architecture, system verification and detailed design approach 

• Define module interfaces and all aspects of device design and simulation coordinated with the PC Board Designers 

• Evaluate the process flow including but not limited to high level design, synthesis, place and route, timing constraints and power utilization 

• Develop test, simulation plans and design verification test plans at design top level 

• Develop, implement and supervise design verification test plans at system level. 

• Support the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the FPGA development life cycle 

• May provide leadership and/or direction to lower level employees 

• Independently determine approach to solutions and get alignment from System Engineers and board developers 

Contribute to design and development of FPGA hardware for control, communications systems and digital signal processing (DSP) platforms. 

Education and experience 

Minimum qualifications – the hired candidate must possess all of the minimum qualifications to be initially considered for the position including:

• BS Engineering with a major in Electrical Engineering and/or Computer Engineering 

• 5+ years relevant design experience (JG8) 

• Required technical skills   

• Highly proficient use and understanding of FPGA engineering concepts, principles, and theories 

• Highly proficient in FPGA design languages and tools including VHDL and UVM or OSVVM (Altera High Level Synthesis is preferred) 

• Experience with FPGA development software - (Modelsim, Quartus, Mentor CDC is preferred)  

• Highly proficient in Microsoft Office applications 

• Experience with FPGA SoC, including Avalon and AXI architectures 

• Experience with architecting and implementing embedded processors including NIOS   

• Proficient in implementing IP blocks based on interface requirements and designing the required interface logic to overall FPGA architecture 

• Expertise using VHDL for implementation and verification of FPGA designs 

• Basic knowledge of signal algorithms 

• Knowledge/hands-on experience with software/technical tools 

• VHDL, System Verilog, UVM 

• Questa Sim, Modelsim, Quartus  

• GIT, JIRA 

• MATLAB and SimuLink 

• Electronic Laboratory Equipment 

• LabVIEW