Sr. Digital Design Engineer

<p><b><u><span>Overview - </span></u></b></p><b><span>A cover letter outlining your motivation to move to, live and work in Belgium, along with a description of what makes you interested and suited for the role is required with submittal of your resume.</span></b><b><span> </span></b><span></span><span>As a Sr. Digital Design Engineer you’re responsible for the design, verification and documentation of control and signal processing modules for state-of-the-art CMOS image sensors.<span>  </span>During the design cycle you will be working in close collaboration with mixed-signal design engineers, perform verification tasks and support the physical integration teams with synthesis, DFT, placement and timing closure related challenges.<span>  </span>During sensor characterization and validation you’ll get the opportunity to work hands-on with the processed silicon in the lab.</span><b><u><span></span></u></b><b><u><span>Responsibilities:</span></u></b><ul><li><span>Image sensor control and processing function design and verification</span></li><li><span>High speed interface (LVDS/MIPI/…) design and verification</span></li><li><span>Full-chip integration, logic synthesis, Logic Equivalence Check (LEC), Static Timing Analysis (STA), Power Analysis and Gate Level Simulation</span></li><li><span>Chip bring-up, validation, and debugging</span></li><li><span>Participate in the FPGA development</span></li><li><span>Architecture, registers, interface and design documentation</span></li><li><span>Test Insertion (scan, MBIST,…)</span></li></ul><b><u><span>Requirements:</span></u></b><ul><li><span>MS degree in Electrical Engineering with at least 4 years of relevant experience in digital design and verification</span></li><li><span>Good knowledge with working experience of design flow, including RTL coding, verification, synthesis, static timing analysis and equivalence check</span></li><li><span>Knowledge of or experience with any of the following topics is a plus:</span></li><ul><li><span>DFT techniques</span></li><li><span>mixed-signal design</span></li><li><span>high performance and low power design techniques</span></li><li><span>FPGA and emulation platforms (for design validation)</span></li><li><span>SoC architectures</span></li><li><span>assertion-based formal verification and/or UVM</span></li><li><span>Functional Safety concepts</span></li><li><span><span><span>Excellent command of English as working language</span></span></span></li></ul></ul><span><span> <strong>EOE/Minorities/Females/Vet/Disability</strong></span></span>