Job Details:

Job Description:

For decades, Altera has been at the forefront of programmable logic technology. Our commitment to innovation has empowered countless customers to create groundbreaking solutions that have transformed industries. The mission of Altera, an Intel company, is to drive the future of FPGA technology around the globe.

As part of the Power and Performance Team, you'll be surrounded by some of the brightest minds in the world as we work across the Altera Engineering team to achieve Performance per Watt leadership for every product in our broad portfolio.

As Power Technical Lead, you will have the opportunity to lead a team of engineers to drive full chip and sub-system level power analysis and optimization. You’ll set power targets, analyze pre-silicon power, oversee power model generation and methodology, and identify critical power optimization opportunities.  In this high-impact role, you will collaborate closely with cross-functional teams (Architecture, Design, Planning, Package, Platform).  You will help define flows to enable efficient and accurate power analysis, including workload- and profile-dependent scenarios.  If you have a passion for low power design and optimization, we would love to talk with you!

Salary Range

$161.7k - $234.1k USD

#LI-KM1

Qualifications:

Education Requirement

Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

What You’ll Bring (Minimum Qualifications)

9+ years (4+ years with PhD) of hardware design experience, including experience in one or more of the following:

• Low power design

• Circuit design & simulation

• Analog design

• Timing sign-off analysis

• Power optimization techniques such as profiling, clock-gating, power-gating, etc.

• Power-related EDA tools such as PTPX, Redhawk, Power Artist and Spice

• Familiarity with PrimeTime, Design Compiler, PnR, UPF, etc.

Ways to Stand Out from the Crowd (Experience in one or more of the following preferred qualifications is considered a plus factor):

• 10+ years of experience in a hardware design related role

• Post-silicon power correlation experience

• Power optimization over full product development cycle

• FPGA and related EDA tools (Quartus/Vivado)

• Flow or tool development using Python/Perl/Tcl

• Master’s or PhD Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.