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Senior | Principal | Member of Technical Staff - AI-optimized Memory RAS Architect - TPG

Micron Technology
United Statesfull_timeVerifiedPosted 9 Dec 2024
💰 $345,000/yr($175,000/yr$345,000/yr)

About the role

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our Opportunity Summary:

For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.

Interested in changing the landscape of artificial intelligence workloads? Come join the team architecting and prototyping very high-performance DRAM-based memory systems for AI! In the Systems Pathfinding organization at Micron, we drive concepts across the stack, from applications to architectures and from concept to product. Interested in making a difference in the future of computing? This is your next opportunity!

As a Senior Engineer, Principal Engineer, or Member of Technical Staff (SMTS) in AI-optimized memory systems architecture, you will contribute to reliability architecture and strategy for very high bandwidth and efficiency DRAM-based memory systems for the AI era. Join technical leaders across workloads, compute architectures, memory systems, memory components, and advanced packaging to build memory optimized for AI workloads.

In our Advanced Architecture DRAM Memory group we’re developing a completely new Architecture that pushes both bandwidth and energy efficiency to levels never seen before in the industry! We’re advancing the optimization of artificial intelligence within our new product line by innovating and integrating end-to-end groundbreaking front-end and backend processes with revolutionary design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence).

Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity.

(Disclaimer): While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate who is motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of premier engineers. In that case, we are determined to help build upon your existing foundation, while rapidly growing your individual and collaborative skills in this exciting and outstanding opportunity.

*This hybrid role will be based out of our Folsom, CA office.

*A combination of education and experience will determine the Seniority level.

What’s Encouraged Daily:

  • Architect and define reliability, addressability, and serviceability solutions, drawing from Micron's world-class knowledge of DRAM.

  • Define and validate reliability and media management algorithms.

  • Analyze media components, packaging, and memory systems failure modes to influence architecture specifications.

  • Collaborate with design engineering, component pathfinding, advanced packaging, and memory systems architecture teams to optimize solutions for end-to-end reliability and efficiency.

How To Qualify:

  • Significant RAS architecture experience, especially focused on memory systems, on one or more shipping products.

  • Expertise in high-performance memory systems, especially HBM or other 3D-stacked architectures.

  • Fault modeling and analysis, especially for future generation products.

  • Programming experience in a high-level language, like C/C++, Java, Python, etc.

What Sets You Apart:

  • Experience with ML/AI accelerators (e.g., GPUs, TPUs, etc.).

  • In-depth understanding of DRAM architectures and failure modes, including row hammer and other disturb mechanisms.

  • Experience with high-performance memory devices, like HBM.

The US base salary range that Micron Technology estimates it could pay for this full-time position is:

$175,000.00 - $345,000.00

Our salary ranges are determined by role, level, and location.  The range displayed on each job posting reflects the minimum and maximum target for new hire salaries of the po

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Company

Micron Technology

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