Principal Engineer, Physical Design (Layout Engineering)
Analog DevicesAbout the role
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).
Principal Engineer, Physical Design (Layout Engineering)
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge (The point where the physical and digital worlds interact, where data is generated, and real-time insights are derived). ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9.4 billion in FY24 and approximately 26,000 people globally working alongside over 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible.
ADI’s Aerospace, Defense, and Communications (ADC) business is focused on three (3) key areas of technology: Data-Converters, Radio Frequency (RF), and Micro Electro-Mechanical Systems (MEMS). Our diverse engineering community is a recognized leader providing forward thinking designs that meets tomorrow’s needs, today, at scale. Whether discreet components or sub-systems, we are disrupting the defense and communication industries by providing the ability to redefine customer challenges. Space is being redefined in ways only previously imagined, both in the defense markets and as an extension of the commercial communication market. The aerospace industry’s resurgence brings the physical world closer than ever before with smarter, faster, more interactive access with innovative technology. Communications infrastructure remains vital to the global economy, driving innovation while enabling disruptive and connected ADI edge applications. Be part of the excitement, bringing your ideas to reality in an environment where you’re encouraged and challenged to reach your full potential. Together – Let’s stay ahead of what’s possible.
Job Duties and Responsibilities
• Lead physical design and integration of complex chips and subsystems in advanced FinFET nodes (16nm and below).
• Drive floorplanning at block, subsystem, and full-chip levels for large-scale designs.
• Collaborate with cross-functional teams (DFT, clock, timing, power integrity, RTL, packaging, and design) to ensure seamless integration and design closure.
• Define and implement design methodologies, best practices, and automation workflows; promote knowledge sharing across teams.
• Oversee physical verification processes including DRC, LVS, ERC, density checks, extraction, EM/IR analysis, and final signoff.
• Manage project schedules, track milestones, and ensure timely delivery using Jira and other project management tools.
• Mentor and lead layout teams, fostering technical growth and ensuring project success.
Qualifications
Required
• Degree in Electrical/Electronic Engineering or equivalent.
• 10+ years of experience in IC layout and physical design.
• Deep expertise in analog and mixed-signal layout practices.
• Proven experience with FinFET processes (16nm and below).
• Hands-on experience with layout of ADCs, DACs, LDOs, PLLs, VCOs, amplifiers, etc.
• Strong knowledge of layout techniques: matching, ESD/latch-up mitigation, parasitic reduction.
• Proficient in Cadence Virtuoso and Siemens Calibre tools.
• Strong problem-solving skills; effective in both independent and collaborative environments.
• Excellent communication and interpersonal skills.
Preferred
• Experience with high-speed (>10GHz) layo
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