Senior RTL Verification Engineer - Design Engineering

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our vision is to transform how the world uses information to enrich life. Join an inclusive team passionate about one thing: using their expertise in the pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in artificial intelligence possible. We do it all while committing to integrity, sustainability, and giving back to our communities.

(Disclaimer): While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of premier engineers. In that case, we are determined to help build upon your existing foundation, while rapidly growing your individual and collaborative skills in this exciting and outstanding opportunity.

*This will be a hybrid position located in Atlanta, GA

*The level of this hybrid role depends on your experience level

                   Can be Senior Engineer or Principal Engineer

As an RTL Verification Engineer, you will work with a highly innovative design team using state of the art technologies to develop the advanced DRAM and DRAM IPs. You will be challenged by the complexity of verifying high density memory chips with ultra-high speed, complex functionality, and advanced power management technologies.

You will need to have the ability to evaluate Full chip or block level functionality and provide solutions to help delivery of functionally correct design. You will work closely with Micron's global design and verification teams to contribute to the success of the design projects by applying verification tools and techniques, providing verification status and summaries to specific designs.

Responsibilities will include, but are not limited to:

• Develop test plans, test bench and verification infrastructure for verifying DRAM IP across multiple products
• Building a verification plan, incorporating directed and random patterns that cover all features of a memory IP.
• Define, develop, and automate flows and methodologies to efficiently build, deploy, and verify RTL IPs
• Build verification components using UVM methodology driving coverage based verification closure
• Debug simulation failures to determine the root cause; work with RTL engineers to resolve design issues 
• Using advanced verification languages and techniques to build a cutting-edge verification platform.
• Participating in creating full chip behavior model that is distributed to Micron’s world-wide external customers.
• Performing verification processes with modeling and simulation using industry standard simulators
• Driving innovation into the future Memory generations within a dynamic work environment

Requirements:

• Fluency in verification languages (System Verilog) and methodologies (UVM)
• Proficient in IP level ASIC verification and debugging RTL code using simulation tools 
• Experience developing UVM block testbenches to RTL IP verification, and developing re-usable sequences and coverage monitors
• Experience with SV assertion development and use of SV assertions for functional coverage
• Experience writing directed tests and constrained pseudo random test
• Solid understanding of object-oriented design
• Ability to abstract complex technical details into an easy to understand interface
• Good debugging and problem-solving skills
• Experience i using scripting language to automate tasks
• Experience defining coverage strategy and writing coverage model
• Must possess good communication skills and ability to work well in a team
• Previous work experience in ASIC or Memory verification
• Good understanding of CMOS circuit design

Education:

• Master’s degree in Electrical Engineering (or equivalent) with 5+ years demonstrated ability or a Bachelors degree with 7+ years of experience in pre-silicon verification (UVM, SystemVerilog), System-On-Chip design/implementation flow, and design automation

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