Senior AI Hardware Architect

Do you want to be at the forefront of innovating the latest hardware designs to propel Microsoft’s cloud growth? Are you seeking a unique career opportunity that combines technical capabilities, cross-team collaboration, with business insight and strategy? 

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees, we come together with a growth mindset, innovate to empower others, and collaborate to achieve our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day. 

Join the Systems Planning and Architecture (SPARC) team within Microsoft’s Azure Hardware Systems and Infrastructure (AHSI) organization, the team behind Microsoft’s expanding Cloud Infrastructure and for powering Microsoft’s “Intelligent Cloud” mission. Microsoft delivers more than 200 online services to more than one billion individuals worldwide, and AHSI is the team behind our expanding cloud infrastructure. We deliver the core infrastructure and foundational technologies for Microsoft's cloud businesses including Microsoft Azure, Bing, MSN, Office 365, OneDrive, Skype, Teams and Xbox Live.    

We are seeking a Senior AI Hardware Architect to join the AI Systems Architecture (ASA) group, where we define and optimize next-generation AI accelerator platforms and large-scale AI systems. In this role, you will drive analytical performance modeling, workload characterization, profiling, and end-to-end performance analysis across GPU and accelerator architectures, working across hardware, software, and system boundaries. 

You will analyze real-world AI workloads on modern GPUs and in-house accelerators, identifying performance bottlenecks and architectural trade-offs through modeling, simulation, benchmarking, and silicon measurement. You will develop models to evaluate new architectural features, memory and communication subsystems, collective operations, and workload mappings, while correlating silicon data and software traces with architectural models to drive performance, perf/W, and TCO optimizations. 

You will collaborate closely with architecture, microarchitecture, compiler, runtime, networking, and systems teams, contributing to performance modeling, correlation, and analysis tools. Through quantitative analysis and cross-platform insights, you will help shape future AI accelerator and system architectures, improving performance, efficiency, scalability, and cost.

• Lead performance analysis, profiling, benchmarking, and analytical modeling across GPU and AI accelerator architectures, identifying bottlenecks, architectural trade-offs, and optimization opportunities across hardware, software, and system layers. 
• Analyze end-to-end AI workloads and serving systems, including model execution, runtime behavior, memory systems, communication collectives, and workload mapping strategies to understand performance, scalability, efficiency, and cost drivers.
• Develop performance, efficiency, and system-level models to evaluate new architectural features, memory and interconnect innovations, collective communication mechanisms, and accelerator design choices, driving perf/W and TCO optimization.
• Correlate silicon measurements, software traces, and kernel execution behavior with architectural models and simulators to validate assumptions, improve model fidelity, and guide future architecture decisions.
• Drive kernel-level, runtime-level, and system-level performance optimizations across AI training and inference workloads, translating workload insights into actionable hardware and software improvements.
• Design and develop data analysis, correlation, visualization, and performance modeling tools that improve debugging efficiency, architectural insight, and decision-making velocity.
• Partner closely with architecture, microarchitecture, compiler, runtime, networking, and systems teams to evaluate design trade-offs and influence product roadmaps through quantitative analysis and technical leadership.
• Present performance findings, architectural recommendations, and design trade-offs to senior technical leadership through architecture reviews, technical reports, and strategic planning discussions.