Senior ASIC Integration and CAD Engineer

Company Description

Our Mission

At Palo Alto Networks® everything starts and ends with our mission:

Being the cybersecurity partner of choice, protecting our digital way of life.
Our vision is a world where each day is safer and more secure than the one before. We are a company built on the foundation of challenging and disrupting the way things are done, and we’re looking for innovators who are as committed to shaping the future of cybersecurity as we are.

Who We Are

We take our mission of protecting the digital way of life seriously. We are relentless in protecting our customers and we believe that the unique ideas of every member of our team contributes to our collective success. Our values were crowdsourced by employees and are brought to life through each of us everyday - from disruptive innovation and collaboration, to execution. From showing up for each other with integrity to creating an environment where we all feel included.

As a member of our team, you will be shaping the future of cybersecurity. We work fast, value ongoing learning, and we respect each employee as a unique individual. Knowing we all have different needs, our development and personal wellbeing programs are designed to give you choice in how you are supported. This includes our FLEXBenefits wellbeing spending account with over 1,000 eligible items selected by employees, our mental and financial health resources, and our personalized learning opportunities - just to name a few!

At Palo Alto Networks, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full time from our office with flexibility offered where needed. This setup fosters casual conversations, problem-solving, and trusted relationships. Our goal is to create an environment where we all win with precision.

Job Description

Your Career

As an ASIC Integration and Physical Design Engineer, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for performance, reliability, and power efficiency.  You will integrate third-party IPs and PANW designs at the subsystem and top levels.  You will guide the design team on strategies for clocks, resets, and synchronization.  You will collaborate closely with the ASIC vendor and the PANW ASIC design team in floorplanning, closing timing, validating constraints, and optimizing power consumption.

Your Impact

• Integrate PANW designs at the subsystem and top levels, ensuring robust solutions for clocks, resets, feedthroughs, and DFT
• Integrate RAMs, CAMs, custom IPs, and IO pads throughout the design hierarchy
• Collaborate with external ASIC vendors to define optimal floorplans, power grids, clocking strategies, and custom routing
• Guide internal RTL designers in closing timing, reducing congestion, optimizing power consumption, and validating constraints

Qualifications

Your Experience 

• BS in EE, CE, or CS required.  MSEE preferred.

• Minimum 5 years experience in ASIC integration and physical design.

• Demonstrated success in taking ASICs to mass production.

• Expertise in synthesis and static timing analysis.

• Required strengths:

  • Integrating RTL modules, memories, custom IPs, and IOs at multiple hierarchical levels.

  • Implementing integration RTL in SystemVerilog

  • Good understanding of global clocking and reset schemes

  • Defining and validating timing constraints and exceptions.

  • Closing timing with static timing analysis and verifying clock domain crossing paths.

• Preferred experience:

  • Creating automated flows for top-level integration.

  • Physical synthesis with Fusion Compiler.

  • RTL quality checks: Lint, CDC, RDC, X-verification.

  • Physical design for networking ASICs with wide data paths and memory-dominant floorplans.

  • Advising designers on optimizing congestion and power dissipation.

•  

• Skilled in writing powerful, modular, and scalable programs in Python / Perl / Unix shell to automate integration and physical design.

• Demonstrated ownership and independence in planning, managing multiple priorities, driving vendors, and reporting status

• Strong leadership, collaboration, and communication skills

Additional Information

The Team

We are the global cybersecurity leader, known for always challenging the security status quo. Our mission is to protect our way of life in the digital age by preventing successful cyberattacks. This has given us the privilege of saf