System Engineer - Interconnect

The Accelerator Reference Design Team is looking for a System Engineer to design, implement, and maintain hardware designs for custom AI hardware interconnects. The ARD team is working on the design and implementation of hardware modules for Meta’s custom AI accelerators. Meta is developing one of the world’s highest performant AI/HPC clusters using custom-designed AI accelerators. In this role, you will have a unique opportunity to shape the future AI/HPC of Meta by specifying technical requirements for custom interconnects, driving specifications and designs of those interconnects, and steering the industry and ecosystem partners.

The ideal candidate will operate in a highly multi-tasked, fast-paced and very cross-functional engineering environment. They will solve complex problems in high-performance AI that span across silicon, hardware, and software. They will also work directly in hardware design and protocol development for high-performance interconnects. A successful candidate will be a HW System and platform builder, work on rack scale solutions, individual servers, and custom ASICs. The candidate will also be fluent in state of the art high-performance interconnects. The position is for a lead developer and architect, debugging complex issues, working in broad and ambiguous problems, and delivering hardware systems at-scale. The candidate will work closely with internal customers and partners who are on the front-line of developing Meta’s custom ASICs for AI.

The Accelerator Reference Design Team designs, builds, brings-up, tests and integrates hardware systems that power Meta’s custom AI silicon platforms, deployed in data centers worldwide. This is a rare opportunity to join our team and help us build some of the world’s most open and efficient AI platforms.System Engineer - Interconnect Responsibilities

• Work as part of the Accelerator Reference Design Team to design, develop, test and integrate high-performance interconnects for Meta’s custom AI hardware
• Collect requirements and develop specifications for Rackscale AI/HPC systems.
• Develop and maintain code, to collect, analyze, and interpret data for interconnect performance between accelerators
• Collaborate with cross-functional teams to develop detailed hardware specifications for our silicon and platforms, focusing on high-performance interconnect
• Develop concepts and proof-of-concept experiments to improve performance and reliability of new and existing interconnects
• Specify and Design the module and interconnect functionality of Meta’s custom AI silicon so that it integrates well with the data centers and the fleet.

Minimum Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• 8+ years of hands-on experience in implementing high-performance computer server systems
• 4+ years of experience in developing and deploying customized high-performance interconnects
• 4+ years of designing or specifying custom silicon functionality for high-performance interconnects
• Basic proficiency in C++ and/or Python
• Experience with general understanding of architectural trade-offs in hardware and software across cost, performance, and reliability
• Experience working effectively as an individual and in a multidisciplinary team
• Troubleshooting skills and the experience diving into software, firmware, hardware, and network problems

Preferred Qualifications

• 10+ years of hands-on experience in implementing high-performance computer server systems
• 6+ years of experience in developing and deploying custom, high-performance interconnects
• Network/fabric bus design & operation experience: Ethernet, Infiniband, RoCE networks, popular HPC fabrics
• Core domain knowledge in servers and networking and at least one of high performance computing or silicon (ASIC or FPGA) development
• Experience in developing both hardware and software for interconnect protocol stacks
• Experienced with system performance analysis, debug, and optimization practices
• Knowledgeable with chip architecture, microarchitecture, design and interconnects
• Familiarity with GPU/accelerator low level programming and performance validation

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