Job Details:

Job Description: 

We are seeking a highly motivated Electrical Engineering Intern to join our Standard Cell Design team. The ideal candidate will have a foundational understanding of standard cell circuit design, basic timing measurements, and layout experience. This internship will provide experience in the field of digital IC design and an opportunity to work alongside industry experts.

Key Responsibilities:

- Assist in the design and optimization of standard cells for digital integrated circuits.
- Perform basic timing analysis and characterization of standard cells.
- Collaborate with the layout team to ensure design rules and quality standards are met.
- Utilize CAD tools for schematic entry, simulation, and layout verification.
- Participate in design reviews and provide feedback on circuit performance.
- Support the team in debugging and resolving design issues.
- Document design processes and results for future reference and improvement.

Candidate must exhibit analytical, problem-solving skills, and communication and teamwork abilities.

This is a hybrid fulltime internship for 3-6 months.

#DesignEnablement

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must be currently pursuing a Master’s degree or PhD degree in Electrical Engineering, Computer Engineering, or a related field.

Experience/Knowledge in the following:

- Basic understanding of standard cell circuit concepts, including logic gates, flip-flops, and complex combinational circuits.
- VLSI design or Circuit design (Familiarity with timing measurements such as setup time, hold time, and propagation delay).
- Experience with layout design and knowledge of layout techniques for CMOS processes.
- Experience in using EDA tools for design (such as cadence virtuoso or custom compiler), simulation (such as Hspice or liberate or primesim or finesim) and verification.

Preferred Qualifications:

Experience/Knowledge in the following:

- Previous internship or project experience in IC design or related field.
- Coursework in VLSI design, semiconductor physics, or digital electronics.
- Familiarity with scripting languages such as Python, Perl, or Tcl for design automation.

          

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, California, San Diego, US, Oregon, Hillsboro

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:  https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$63,000.00-$166,000.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their ass