Staff Engineer, Device Engineering

pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.

Job Summary

Member of team responsible for RF Technology development for pSemi’s patented high-performance UltraCMOS™ technology. This position will work closely with technology, modeling and CAD engineers to support internal design groups and external foundry customers driving device development, simulation, characterization and optimization of advanced RF-SOI technologies for RF front-end applications including RF switches, low noise amplifiers (LNA), power amplifiers (PA), analog and digital solutions. 

Roles & Responsibilities

This position has responsibility for:

• RFSOI Device development and technology optimization projects in collaboration with cross-functional teams.
• Develop a deep understanding of the relationship between RF performance, DC performance, device architecture, layout, process integration, and manufacturing variability.
• Design and execute technology development vehicles, split lots, and Design of Experiments (DOE) for process and device optimization.
• Utilize TCAD process and device simulations (2D/3D) to understand device behavior, evaluate technology options, and guide development decisions.
• Correlate TCAD simulation results with silicon measurements and characterization data.
• Work closely with wafer fabrication and process integration teams to optimize device performance, yield, and reliability.
• Work closely with Characterization team and create measurement plan for semiconductor devices such as DC, CV, RF, small-signal, large-signal, load-pull, and reliability methodologies.
• Analyze process sensitivities and identify opportunities for performance, manufacturability, and yield improvement.
• Apply statistical methodologies to evaluate device distributions, process capability, variability sources, and reliability trends.
• Partner with foundries and internal fabrication teams to resolve process integration issues and improve technology robustness.
• Support compact model development, device parameter extraction, and technology qualification activities.
• Generate technical reports and present findings to engineering management and cross-functional stakeholders.

Minimum Qualifications (Experience and Skills)

• Strong understanding of semiconductor device physics, particularly SOI and RFSOI technologies.
• Hands-on experience with semiconductor process development and wafer fabrication.
• Experience working with CMOS and SOI process technologies.
• Experience with TCAD process and device simulation tools such as Synopsys or Silvaco.
• Experience using JMP, MATLAB, Python or equivalent statistical software.
• Excellent data analysis, problem-solving, and communication skills.
• Basic understanding of high frequency measurements (S-parameters, Load Pull, Harmonics, and Noise Figure).
• Understanding of device reliability mechanisms including HCI, BTI, TDDB, and ESD.
• Basic understanding of how devices are used in RFIC design.
• Understanding of the interaction between semiconductor manufacturing and device performance

Preferred Qualifications

• Experience developing RF SOI switches, LNAs, PAs, or related RF front-end products.
• Experience working directly with semiconductor foundries and manufacturing organizations.
• Knowledge of process integration, technology transfer, and yield ramp activities.
• Experience with Cadence design and layout environments.
• Familiarity with circuit simulation tools such as Cadence Virtuoso or ADS.
• Programming experience in Python, MATLAB, JMP or similar environments for data analysis and automation.
• Understanding of small and large signal characterization and data analysis.
• Reliability Testing
• Strong background in RF device characterization and analysis.