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Senior Application Engineer (SoC/ASIC IP)

Analog Devices
Wilmington, United Statesfull_timeVerifiedPosted 23 May 2025
💰 $149,600/yr($108,800/yr$149,600/yr)

About the role

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

We are seeking an experienced IP Application Engineer to join the Central IP organization with a strong foundation in Analog Mixed Signal development to drive strategic and execution-level IP engagements across the company. This role is a blend of application engineering and technical program management (TPM) involving end-to-end management of third-party IP, including roadmap planning, vendor engagement, and technical support across domains such as Interface IP (USB, D2D, UCIe, PCIe), Processors and Security IP. The ideal candidate will work closely with internal teams to understand IP needs, drive Strategic IP standardizations, manage vendor engagements, and provide technical support for IP integration challenges. This role is highly visible and crucial in accelerating product development across all domains within ADI.

Key Responsibilities:

  • Drive evaluation and standardization of Analog Mixed Signal IP across various domains, including USB, Ethernet, PCIe, UCIe, D2D, LPDDR, SerDes, ADC, DAC, PLL
  • Lead roadmap alignment efforts between internal product teams and IP vendors to ensure timely and relevant IP availability.
  • Work cross-functionally with Hardware, Product Test and architecture teams to define and track IP requirements and influence architectural decisions.
  • Provide hands-on support as an Application Engineer, assisting teams in debugging and optimizing Hardware IP integration challenges.
  • Own and drive automation of IP management processes including tracking, validation, delivery management, and compliance reporting.
  • Oversee vendor engagements, licensing agreements, and compliance with contractual obligations.
  • Lead technical program management efforts to ensure timely Vendor IP selection, deployment, and tracking.
  • Stay updated on industry trends and provide Guidance and Recommendations for adopting new IP solutions.
  • Establish and evolve IP integration best practices to promote reuse, consistency, and quality across programs.

Qualifications:

  • 6+ years of experience in managing/designing Analog Mixed Signal IPs, technical program management, or application engineering.
  • Strong technical understanding of Analog Mixed Signal IPs (USB, Ethernet, PCIe, UCIe, D2D, LPDDR, SerDes, ADC, DAC, PLL) and its digital controller interfaces.
  • Experience working with Verilog, SPICE and other modeling/verification environments
  • Familiarity with RTL-to-GDS flow and IP views (LEF/DEF, Liberty, Verilog, IBIS etc.)
  • Understanding of package/board-level behavior of AMS IPs (ESD, decap, SI/PI)
  • Experience with scripting languages (Python, Perl, Tcl) for automation.
  • Comfortable working with cross-functional teams and managing deliverables across multiple stakeholders
  • Familiarity with IP licensing, compliance, and vendor management.

Preferred Qualifications:

  • Hands-on experience with analog modeling techniques, including Verilog-A/AMS or behavior modeling
  • Knowledge of analog verification and validation flows including Spectre, HSPICE, Monte Carlo/Corner analysis and mixed-signal simulation methodologies
  • Familiarity with chip-level constraints and interactions such as substrate coupling, power integrity, CDC and ESD considerations
  • Track record of collaborating with external IP suppliers, including driving IP evaluations, bug resolution and roadmap alignment
  • Familiarity with SoC product lifecycle, from architecture to tape-out.
  • Experience with silicon debug and bring-up is a plus.

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Analog Devices

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