Principal Technical Program Manager – ASIC Development - TeraWave

Application close date:

Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!  

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

Role Overview 

We are seeking a Principal Technical Program Manager – ASIC Development to lead execution of complex ASIC/SoC programs from architecture through tapeout, bring-up, qualification, and production. This role requires strong technical fluency in silicon development and the ability to drive alignment across design, verification, physical implementation, packaging, test, manufacturing, and system integration teams. 

Responsibilities:

• Lead end-to-end execution of ASIC/SoC development programs from concept through production. 
• Build and manage integrated schedules across architecture, RTL, verification, DFT, physical design, packaging, post-silicon validation, qualification, and manufacturing ramp. 
• Drive cross-functional execution across ASIC design, DV, PD, CAD, firmware, board, package, test, reliability, supply chain, and manufacturing teams. 
• Partner closely with network, spacecraft, and RF teams to ensure ASIC development supports an optimized systemwide solution across payload, platform, and communications architecture. 
• Track technical dependencies, critical path, program milestones, tapeout readiness, and silicon bring-up deliverables. 
• Manage technical risks related to schedule, design maturity, IP readiness, verification closure, physical signoff, package/test readiness, and supply chain. 
• Coordinate external partners including foundries, IP vendors, OSATs, test houses, and manufacturing suppliers. 
• Drive issue resolution during pre-silicon execution, tapeout, bring-up, debug, qualification, and yield learning. 
• Support silicon planning across performance, power, area, cost, reliability, and manufacturability tradeoffs. 
• Establish program reviews, metrics, and execution mechanisms for predictable delivery. 

Basic Qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. 
• 10+ years of experience in technical program management, engineering program management, or semiconductor product development. 
• 5+ years of experience leading ASIC or SoC programs through multiple phases of the silicon lifecycle. 
• Experience managing cross-functional silicon development teams and external semiconductor partners. 
• Experience with program planning, dependency management, milestone tracking, and technical risk management. 

Preferred Qualifications:

• Master’s degree or PhD in Electrical Engineering, Computer Engineering, or related field. 
• Experience delivering advanced ASIC/SoC products in communications, networking, compute, DSP, or mixed-signal applications. 
• Experience with high-speed interfaces, SerDes, memory subsystems, embedded processors, or power-constrained designs. 
• Experience at advanced process nodes and with complex package technologies. 
• Experience developing silicon for satellite, space, aerospace, or other mission-critical applications. 
• Familiarity with satellite processing, communications, modem/baseband, networking, SDR, or onboard compute applications. 
• Experience with high-reliability design and qualification for harsh environments, including thermal vacuum, thermal cycling, vibration, and shock. 
• Familiarity with space-grade screening, traceability, derating, failure analysis, and long-lifecycle component management. 
• Knowledge of packaging, reliability, and mission assurance considerations for silicon used in non-serviceable, long-duration deployments. 

 

Compensation Range for:

CA applicants is $169,624.00 - $237,473.25 WA applicants is $169,624.00 - $237,473.25

Other site ranges may differ

Culture Statement

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