Senior Design Engineer

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. 

We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team.  The successful candidate would be highly motivated and a self-starter, who will thrive in this cutting-edge technical environment.  You will be part of the design team, driving many facets of high performance, high bandwidth designs.

Responsibilities

• The tasks will include working on Intellectual Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, synthesis, and System on Chip (SOC) integration on different subsystems.
• Throughout the program you will be interacting with various teams, including architecture, verification, and physical design, ensuring that the design is implemented and verified to the spec.
  

• Other 

  • Embody our culture and values 

Qualifications

Required Qualifications:

• 7+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 4+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/LINT closure.
• 4+ years of experience in Synthesis, Timing constraints, Power, Performance, Area (PPA) trade-offs and Post-Silicon Debug.
• 2+ years of experience with Peripheral Component Interconnect Express (PCIe).

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: 

• Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferrred Qualifications:

• 11+ years technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
• 4+ years of experience with Synthesis, Synopsys Design Constraints (SDC) constraints and Unified Power Format (UPF).
• 4+ years of experience working on SOC integration.
• Experience with industry standard interfaces such as Advanced Extensible Interface (AXI), Advanced Peripheral Bus (APB).
• Experience with writing System Verilog assertions and coverpoints.

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $112,000 - $218,400 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area an