Member of Technical Staff (#93071)

Responsible for performing the microarchitecture and logic design verification of Rivos centralprocessing unit (CPU). Study the CPU architecture specifications and performance featuresspecifications, write, and execute test plans, build test benches, and verification infrastructuresfor performance features. Manage testbenches and work with micro architect engineers to verifythe design, fix bugs, as well as work with the post-silicon verification engineers to verify siliconbugs. Execute test plans for features specified in architecture and performance specifications tobuild and enhance the verification infrastructures for a focused design area. Discuss design plansusing RTL design language such as Verilog, logic assertion, and verification flow. Designcontrol systems using programming languages such as System Verilog, C++, and Python. Workclosely with micro architects, logic designers and peer verification engineers to designpragmatic design verification infrastructure code space that will be an effective verification planfor complex designs. Test products for functionality and contribute to the overall quality of theCPU’s functional and performance features focusing on targeted functionality and performancespecification.

Education:

• Master’s or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic
Engineering, or related field

Experience:

• 6 months of experience in job offered or related occupation.

Special Requirements: Must have coursework / project background in the following:

• 1. Computer Organization and Design.
• 2. Computer System Engineering.
• 3. Digital Systems Laboratory.
• 4. Manycore Parallel Algorithms.
• 5. Communication Networks.
• 6. Distributed Systems.

Worksite: 6433 Champion Grandview Way, Building 2, Suite 150, Austin, Texas 78750Applicant Instructions: Email resume to: immigration@rivosinc.com. Include job code 93071 in reply. EOE.