Experienced Technology Development GaN Epitaxy MOCVD Engineer

About GlobalFoundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:

GLOBALFOUNDRIES is seeking highly skilled and motivated semiconductor process development engineer to join our Fab9 Technology Development team to develop and qualify world class differentiated semiconductor technologies for manufacture in the 200mm manufacturing fabricator in Essex Junction, Vermont (Fab9).  As a process development engineer you will be responsible to design and develop discrete semiconductor GaN Epitaxy processes that that meet the performance, reliability, yield, and cost objectives to drive the advancement of our semiconductor foundry technology offerings for Analog, Mixed Signal, Power, Radio Frequency (RF) and other differentiated market applications.

Essential Responsibilities    

• Initial and primary responsibilities could include but not limited to the following:

• Develop and evaluate the MOCVD III-V epitaxial processes. Technology platforms can include bulk silicon, silicon-on-insulator (SOI), silicon germanium (SiGe), and wide band gap semiconductors (e.g. GaN, SiC, etc).

• Define and optimize III-V superlattices, buffers, and device layers and requirements as defined in the Technology Development roadmap.

• Plan and manage processing of wafer lots to meet program schedules.

• Perform and evaluate experiments using multiple techniques and failure analysis signals such as SIMs, SEM, TEM, AFM (Atomic Force Microscopy), etc. – Work with our cross-organization teams to obtain and interpret

• Address manufacturability challenges such as epitaxial deposit time, selectivity, etc.

• Collaborate with the various development test, test-site, process, integration, and program management teams within our group to lead the development of new epitaxial processes to meet performance, reliability, yield, and cost objectives.

• Collaborate with various engineering teams outside the Fab9 Technology Development team, e.g., testing, failure analysis, unit module process, reliability, manufacturing, and research organizations, to facilitate and achieve program success.

• Collaborate with manufacturing process engineers and characterization teams on evaluations of optimal processes

• Work with semiconductor process teams on novel process integration.

• Work with Reliability team on any issues or concerns with the quality of the new semiconductor processes

• Plan, execute, characterize, and determine outcomes/actions of process development learning cycles and document accordingly.

• Define process specifications, and document Process of Record in controlled engineering specifications.

• Document & Create process qualification packages for internal Reliability, Manufacturing, and Quality Teams.

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Other Responsibilities:

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:     

• Education: Minimum Master’s Degree in Electrical Engineering, Microelectronics, Material Science, Solid State Physics or other relevant engineering or physical science discipline.

• Experience: Minimum 7 years of relevant engineering experience.

• Travel Requirements: < 10% of Travel.

• Language Fluency: English (written & verbal)

• A comprehensive knowledge of modern device physics: FET, BJT, LDMOS, and HEMT devices in bulk    silicon, silicon-on-insulator (SOI), silicon germanium (SiGe), and/or compound semiconductor (e.g. GaN, SiC, etc) technologies.

• Familiarity of MOCVD III-V Epitaxial Growth Techniques.

• Familiarity of semiconductor device electrical testing and analysis methods.

• Familiarity with the usage of TCAD to simulate devices.

• Knowledge in device reliability mechanisms, device physical characterization (SIMS,