CPU Verification Fellow, RISC-V High-Performance Processor

<div class="content-intro"><p>Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.</p></div><p class="wnfdnts _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea" data-pm-slice="1 1 []">Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up.</p> <p>This role is<strong> </strong>hybrid, based out of Santa Clara, CA or Austin, TX.</p> <p>We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.</p> <p> </p> <p><strong>Who You Are</strong></p> <ul> <li>You have deep experience verifying high-performance superscalar CPUs, ideally including out-of-order and speculative processors.</li> <li>You have strong knowledge of RISC-V architecture, including ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior.</li> <li>You are highly proficient in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and advanced debug methodologies.</li> <li>You have hands-on experience with CPU reference models, instruction generators, ISS-based checking, or differential testing.</li> <li>You bring practical expertise with formal verification and large-scale CPU verification environments.</li> </ul> <p> </p> <p><strong>What We Need</strong></p> <ul> <li>A verification leader who can own strategy for RISC-V high-performance superscalar CPUs and CPU subsystems.</li> <li>An expert who can drive verification planning for out-of-order, speculative, superscalar microarchitectures.</li> <li