Principal ASIC Physical Design Engineer

Company Description

Our Mission

At Palo Alto Networks® everything starts and ends with our mission:

Being the cybersecurity partner of choice, protecting our digital way of life.

Our vision is a world where each day is safer and more secure than the one before. We are a company built on the foundation of challenging and disrupting the way things are done, and we’re looking for innovators who are as committed to shaping the future of cybersecurity as we are.

FLEXWORK is an employee-centric reimagining of how we work. We built FLEXWORK based on employee feedback – it is about flexibility, trust, and choice whenever possible. It’s been a journey of disruption that has yielded the best of our values. We offer as much flexibility as possible, and choices that enable you to be most productive, including benefits that meet your needs and learning opportunities that you feel passionate about.

Job Description

Your Career

As an ASIC Physical Design Engineer, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for performance, reliability, and power efficiency.  You will collaborate closely with our ASIC vendor and lead our ASIC team in floorplanning, closing timing, validating constraints, and optimizing power consumption.  You will define physical design flows and guide the design team on strategies for clocks, resets, and synchronization.  You will collaborate with internal and external stakeholders on defining the electrical specification, chip I/O, and package design.

We expect office-based employees to be in the office four days per week, with one day working from where they choose. We believe being together facilitates casual conversations and those magic moments where we can work on issues and ideas informally. These moments build capability and deepen trusted relationships and allow our people to feel safe in taking risks and being disruptive. Like so many companies, we are working through the details and things could change …. but in general if a role is deemed office-based we want our teams to be together four days per week.

Your Impact

• Collaborate with hardware engineers to define the electrical specifications, chip I/O, package design, and requirements for power and signal integrity
• Collaborate with external ASIC vendors to define optimal floorplans, power grids, clocking strategies, and custom routing
• Guide internal RTL designers in closing timing, reducing congestion, and optimizing power consumption
• Drive timing closure and constraint validation for the overall ASIC design
• Advise silicon bringup and validation teams on clock, reset, synchronization, and power issues

Qualifications

Your Experience

• BS in EE, CE, or CS required or equivalent military experience required - MSEE preferred
• Minimum 10 years experience in ASIC physical design
• Demonstrated success in taking multiple ASICs from concept to mass production
• Expertise in synthesis and static timing analysis
• Required strengths
  • Guiding floorplanning, chip I/O, and package design
  • Defining and validating complex timing constraints and exceptions
  • Closing timing with static timing analysis and verifying complex clock domain crossing paths
  • Advising senior designers on optimizing congestion and power dissipation
• Preferred experience
  • Physical design for networking ASICs with wide data paths and memory-dominant floorplans
  • Engaging with third-party ASIC vendors in all phases of chip development, including RFQs and SoWs
  • Creating automated flows for top-level integration
  • Installing and managing design and technology libraries
  • Integrating custom IPs including PLLs, serdes, clock dividers, and analog circuits
• Skilled in writing powerful, modular, and scalable programs in Python / Perl / Unix shell to automate physical design and integration tasks
• Demonstrated ownership and independence in planning, managing multiple priorities, driving vendors, and reporting status
• Strong leadership, collaboration, and communication skills

Additional Information

The Team

To stay ahead of the curve, it’s critical to know where the curve is, and how to anticipate the changes we’re facing. For the fastest growing cybersecurity company, the curve is the evolution of cyberattacks, and the products and services that proactively address them. Our engineering team is at the core of our products – connected directly to the mission of preventing cyberattacks. They are constantly innovating – challenging the way we, and the industry, think about cybersecurity. These engineers aren’t shy about creating products to s