Senior Design Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. 

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AI Silicon Engineering (AISiE) SoC Design Verification team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.  

 We are looking for a Senior Design Verification Engineer to join the team. 

#SCHIE 

• Buid, validate and automate emulation models with constant improvement in runtime efficiency. Preferred platforms include Zebu and Palladium.  

• Develop complex verification environments and test suites, including pre-silicon functional verification at the block, chip, and system levels, reference modeling, and post-silicon validation. 

• Collaborate with architects and design engineers to define verification plans, including strategy, test environments, and requirements for IP/Subsystem/SoC-level verification. 

• Create and drive comprehensive test plans and develop tests to ensure full feature coverage. 

• Design and implement technical solutions to address complex design and quality challenges. 

• Develop verification components such as scoreboards, sequences, constrained random tests, assertions, and functional coverage models. 

• Triage and debug failures in testbenches, simulations, and emulation environments. 

• Develop Makefiles and automation scripts to enable scalable and efficient verification flows. 

• Apply Agile methodologies, including participation in code reviews, sprint planning, and continuous integration practices. 

• Collaborate effectively with cross-functional teams across multiple sites and geographies

Required Qualifications: 

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.

Preferred Qualifications: 
 

• 6+ years of experience in creating emulation and simulation environments, developing tests, and debugging for multiple silicon IP's or systems. 

• 3+ years’ industry experience of chip and/or computer architecture. 

• 3+ years industry experience in Verilog, C/C++, and scripting language such as Python, Ruby or Perl 

• CPU or Graphics core verification experience 

• Experience with hardware emulation or FPGAs. 

• In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure. 

• Experience with hardware design for embedde