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Sr Staff R&D Engineer - Enterprise SerDes Physical Implementation

Synopsys
Agrate Brianza, Italyfull_timeVerifiedPosted 20 Aug 2025

About the role

<h3> General Information </h3> Job Title Sr Staff R&amp;D Engineer - Enterprise SerDes Physical Implementation Job ID 12538 Country Italy City Agrate Brianza Date Posted 12-Aug-2025 Job Category Engineering Job Subcategory ASIC Physical Design Hire Type Employee Remote Eligible No <h3> Descriptions &amp; Requirements </h3> Job Description and Requirements <p><span id="isPasted">In this role, you will be responsible for the Physical Implementation of high speed interface IPs and test-chips, driving all aspects from RTL to GDS including timing and physical sign-off, in close interaction and collaborative team work with multiple functional groups (front end, analog, CAD) and the product team.  As well, you will be expected to lead a small team of engineers performing these same tasks.<br/><br/> As a Sr Staff R&amp;D Engineer, the successful candidate will work on a variety of advanced SERDES developments including the latest 56G/112G/224G PAM4/6 standards, all at the latest process nodes. The Mixed-Signal IP organization is seeking a highly motivated individual responsible for the physical implementation of complex Mixed signal IPs and test chips across multiple process technologies with a specific focus on very advanced high speed SERDES platforms.<br/><br/> The successful candidate will have the following:</span></p><p><span><br/> - 12 + years of digital or physical design experience with recent contribution to project tape-outs, as a technical driver and/or project lead.</span></p><p><span>- </span><span>Intimate knowledge of the full design cycle from RTL to GDSII, including chip level.<br/> - Experience with advanced FinFET nodes, TSMC 16 nanometer or below, including low-power design techniques<br/> A solid engineering understanding of the underlying concepts of digital design and architecture, implementation flows and physical and timing signoff<br/>- Development of timing constraints and design architectures to ensure on-time delivery, and to meet or exceed power and area targets<br/>- Excellent communication skills, ability to think and communicate at different levels of abstraction, with peer groups as well as customers.<br/>- Methodology driven with strong software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.<br/>-Solid understanding of the challenges

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Synopsys

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