Principal System Architect

Do you want to be at the forefront of innovating the latest hardware and systems designs to propel Microsoft’s cloud growth? Are you seeking a unique career opportunity that combines technical capabilities, cross team collaboration, with business insight and strategy?

Join our Leading-Edge Architecture Pathfinding (LEAP) team within the Strategic Planning and Architecture (SPARC) organization in Azure Hardware Systems & Infrastructure (AHSI). AHSI is the team behind Microsoft’s expanding cloud business, responsible for delivering the hardware systems and infrastructure for cloud computing across Microsoft Azure, Bing, MSN, Office 365, OneDrive, Skype, Teams and Xbox Live. 

The SPARC organization is responsible for strategy, planning and architecture pathfinding, and manages Azure’s hardware roadmap from architecture concept through production for Microsoft’s current and future on-line services. The LEAP team within SPARC is at the forefront of systems architecture and technology pathfinding spanning compute, memory, storage, network and system interconnects. Drawing on deep insights of workloads, emerging technology trends, and focused industry engagements, LEAP team’s charter is to define and evaluate novel systems architecture innovations through hardware/software co-design and advance them through technical readiness for productization.

The LEAP team is seeking a Principal System Architect to lead architecture evaluation and pathfinding of high-performance memory-centric system interconnects for scale-up system designs to enable efficient pod-scale compute and memory fabric solutions for accelerated computing workloads. This role has substantial technical and roadmap shaping responsibilities that require in-depth technical expertise in system interconnects, scale-up topologies, parallel computing and communication algorithms/libraries. The candidate should have a proven track-record co-designing system innovations collaborating with software and workload experts, and experience to influence and drive innovations from concept to productization.

Success in this role requires:

• Listening to those who operate Azure and their customers to identify current and emerging problems 
• Identifying promising technologies to address problems that are relevant for Azure business, engage with ecosystem partners, and derisking productization via capable proof-of-concepts 
• Working across organizational boundaries with roadmap planners, product architects, and hardware and software engineering teams to land promising solutions in Azure data centers. 

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

Responsibilities

• Lead path finding for high-performance and efficient memory-centric interconnect technologies for scale-up communication and memory disaggregation/expansion for accelerated computing systems.
• Collaborate across domain experts on AI workloads, software stacks, System-on-Chip (SoC), and platform infrastructure to engineer TCO-optimized solutions for Azure AI usages.
• Engage with Azure’s supplier ecosystem on collaborations that deliver on the above charter
• Influence and shape hardware architecture, targeting three-to-six-year timeframe, with data-driven analysis, insights and recommendations.
• As appropriate, participate in industry standard bodies and consortia to drive relevant technologies.

Other

• Embody our Culture  &  Values 

Qualifications

Required/Minimum Qualifications:

• Bachelor's Degree in Computer Science, or related technical discipline AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python

           o OR equivalent experience.

• 8+ years of experience in systemand SoC architecture with <