Senior Design Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. 

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Artificial Intelligence System on Chip (AISoC) Silicon team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.  

 We are looking for a Senior Design Verification Engineer to join the team. 

Responsibilities

• Perform pre-silicon verification for complex IP, including creating testplans, developing Universal Verification Methodology (UVM) components and environments from scratch, writing test cases, debugging failures to root cause issues, running and maintaining regression suites, and closing coverage. 
• Interact with architects and design engineers to create testplans covering verification strategy, test requirements, and test environments for IP/SS/SOC level verification. 
• Define verification strategy, requirements, test environments for IP/SS/SOC level verification. 
• Create test-plans and write tests to provide complete features coverage. 
• Develop and implement technical solutions to complex quality and design challenges. 
• Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage. 
• Triage and debug testbench, simulation, and emulation fails. 
• Develop Makefiles and scripts for verification infrastructure. 
• Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment. 
•  Collaborate with teams across sites and geographies. 

Qualifications

Required/Minimum Qualifications:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience 
  • OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience 
  • OR Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience 
  • OR equivalent experience.
• 5+ years of Technical Engineering Experience with Universal Verification Methodology (UVM), System Verilog and Verification Fundamentals 
• 3+ years of debugging RTL (Verilog) des