Senior Staff UVM Verification Engineer

Overview

Prodapt ASIC services (formerly Innovative Logic) is the leading provider of SoC ASIC/FPGA and Embedded Software services. Our business model is to offer our services based on turnkey, Offshore design center (ODC) or staff augmentation.

 

We're seeking a passionate Verification Engineer with a strong background in UVM-based verification and experience in working with complex ARM/RISCV/x86 CPU based SOCs to join our dynamic team. Must have experience building test benches from scratch. 

 

Must be willing to work onsite at Mountain View, CA 

Responsibilities

As a Verification Engineer with expertise in subsystems and SoCs, you will be responsible for verifying the functional correctness of RTL for infrastructure SOCs. 

• Lead and manage Design Verification efforts for complex projects, ensuring the successful execution of verification plans.
• Develop and implement comprehensive Design Verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like USB, CXL, PCIe, Ethernet, MIPI and DDR

Requirements

• Experience with SystemVerilog and verification methodologies (UVM/OVM)
• Solid understanding of digital hardware design
• Detailed understanding and experience of current verification strategies for sophisticated SOC development, including software-based techniques.
• Good knowledge of test plan creation and tracking.

 

Nice To Have Skills & Experience:

• Experience with ARM-based designs and/or ARM/RISCV/x86 CPU based SOCs
• Experience leading teams or projects.
• Experience or knowledge in clock domain crossing verification, power-aware verification, and development of complex SOCs on emulation platforms.
• Experience working with emulators and debugging complex SOC designs.