Senior Staff Reliability Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Reliability Engineering Team is core part of the Marvell Quality organization and focuses on design for quality/reliability, qualification, reliability testing, supplier enablement and risk analysis of cutting edge products across all of Marvell’s Custom Compute, Data Center, Enterprise, and Carrier business.

What You Can Expect

• Develop next generation/high-power solutions for package/wafer-level HTOL and production BI.
• Define the strategy and prepare the plan for new product/process qualification.
• Build product qualification schedule and provide frequent status updates for the qualification activities.
• Define the requirements for the qualification hardware (HTOL, HAST board etc.) and work with the testing labs and internal teams to design, verify and deliver the qual hardware.
• Drive robust and error-free execution of qualification and reliability testing for new products per agreed qualification plans.
• Manage reliability suppliers/subcontractors for execution of product qualification tests.
• Support the qualification of new vendors, change of design/manufacturing/ materials for reliability evaluation, product qualification and test.
• Write product qualification reports and related document.Drive the failure analysis activities as needed for the completion of qualification /reliability evaluation.
• Support customer quality and reliability information requirements.

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience. OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience
• 3+ years of experience in product qualification and reliability testing for semiconductor products.
• Proven experience in developing high-power HTOL/Production Burn-In for Wafer/Package level advanced node products.
• Knowledge in semiconductor fabrication processes, packaging technologies and project planning and scheduling.
• Demonstrable and extensive IC Reliability knowledge: IC /PIC testing, Electrical (HTOL) testing, Environmental Stress, ESD/LU testing, SER testing
• In-depth knowledge of semiconductor stress testing methodology (HTOL, HAST, TC, HTS, ESD, LU etc.), industrial standards (including JEDEC, AEC and Telcordia) and requirements.
• Must possess excellent communication skills, Interpersonal skills as well as strong planning and organization skills.
• Must be able to work independently and in a team environment, with strong social skills, specifically a demonstrated ability to effectively work with cross-function teams.
• Experience working with vendors on HTOL stress pattern bring-up, execution of testing, and hardware design.
• Experience with reliability data statistical analysis and the use of data analysis software tools is a plus (e.g JMP, Reliasoft, Minitab)
• Good understanding of FMEA process and risk assessment is a plus.
• Hands-on experience with data analysis/debug and HTOL set-up is needed.
• Broad understanding of the IC fab and packaging processes, product, and testing.
   
• Additional preferred requirements are a plus:
  • Experience in advanced node (2nm/3nm) hyperscaler Multi-Chip-Modules and advanced Packaging (CoWoS-S/R/L, SoIC, EMIB) projects.
  • Experience with reliability lifetime modelling and calculation. 
  • Knowledge of Si product level reliability qualification and lifetime behavior models.
  • Knowledge of reliability failure modes of silicon/packaging technologies and failure mechanisms with respect to reliability.
  • Experience with reliability HW setups and equipment for life stresses, environmental stresses, ESD, Latch-Up, SER, other testing.

Expected Base Pay Range (USD)

122,200 - 183,000, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.