Digital Integrated Circuit Design Verification Engineer

Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together. The Company’s three core products are Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world; Lens Studio, an augmented reality platform that powers AR across Snapchat and other services; and its AR glasses, Spectacles.

Spectacles is home to our hardware products with a world-class research & development team. We are focused on pushing the boundaries of what a camera can be, specifically overlaying computing on the real world. Next Generation Spectacles are our first pair of glasses that bring augmented reality to life. 

The Spectacles team is pushing the boundaries of technology to bring people closer together in the real world. Our fifth-generation Spectacles, powered by Snap OS, showcase how standalone, see-through AR glasses make playing, learning, and working better together. 

We’re looking for a Design Verification Engineer to join the Spectacles Team at Snap Inc!

What you’ll do:

• Work as part of a multi-disciplinary team designing display Integrated Circuits for AR

• Work closely with digital design, analog logic, software and verification engineers

• Develop and implement UVM-based and assertion-based testbenches

• Create and execute verification test plans, including functional coverage and code coverage

• Utilize Siemens Questa tool set for verification and debug tasks

• Specify and configure tools and create automation

Knowledge, Skills & Abilities:

• Strong knowledge of UVM and SystemVerilog for advanced verification methodologies

• Strong knowledge of digital functional simulation, and tools such as Siemens Questa

• Strong knowledge of good Verilog RTL coding practices

• Scripting and automation, such as TCL, Make, Perl, Python and Shell scripts in Linux environment

• Excellent written and verbal English communication

Minimum Qualifications: 

• BSEE or MSEE or relevant years of experience 

• 10​​+ years of experience in ASIC Design Verification

Preferred Qualifications:

• Experience with entire verification process from planning to sign-off

• Experience with Siemens’ UVM Framework

• Experience in emulation

• Experience in RTL design

• Familiarity with video and display systems, MIPI, AMBA, I2C, SPI protocols and embedded microcontroller

• Familiarity with ASIC test or production flow

• Ideal candidate is a self-starter, can organize complex issues and drive them to closure

• Able to multitask and prioritize.

If you have a disability or special need that requires accommodation, please don’t be shy and provide us some information.

"Default Together" Policy at Snap: At Snap Inc. we believe that being together in person helps us build our culture faster, reinforce our values, and serve our community, customers and partners better through dynamic collaboration. To reflect this, we practice a “default together” approach and expect our team members to work in an office 4+ days per week.