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Sr. Principal Engineer, MLA Architecture (AI2429)
SiMa.aiSan Jose, United Statesfull_timeVerifiedPosted 1 Aug 2025
💰 $317,200/yr($240,000/yr – $317,200/yr)
About the role
Job Title: Sr. Principal Engineer, MLA Architecture Job Location: San Jose, CA
Job Number: AI2429 Job Description: As a Sr. Principal Engineer in the Platform Architecture group, you will be responsible for the architecture of core components of SiMa.ai proprietary Machine Learning Accelerator (MLA). You will also adapt and maintain a performance and power analysis tool to model neural networks running on SiMa.ai’s MLA that helps with predicting the performance and power consumption of neural networks on current and future architectures. Areas of focus: Sr. Principal Engineer, MLA Architecture Key Responsibilities:
Job Number: AI2429 Job Description: As a Sr. Principal Engineer in the Platform Architecture group, you will be responsible for the architecture of core components of SiMa.ai proprietary Machine Learning Accelerator (MLA). You will also adapt and maintain a performance and power analysis tool to model neural networks running on SiMa.ai’s MLA that helps with predicting the performance and power consumption of neural networks on current and future architectures. Areas of focus: Sr. Principal Engineer, MLA Architecture Key Responsibilities:
- Conceptualize, build and deliver the architecture of core components of the MLA:
- Research, scope, propose and validate new architectural ideas around improving the many aspects of an MLA including sparse tensor processing, decompression of weights, numeric formats like MXFP8, first level and second level memories, and the DMA.
- Adapt and maintain the performance and power analysis tool:
- Adapt the tool to analyze key performance and power drivers in SiMa.ai’s MLA architecture for relevant neural networks like ViTs. Coarsely model key IPs like the DMA/DRAM in the MLSoC to address performance and power issues.
- Identify HW/SW trade-offs/enhancements and work with the compiler/tool chain team and silicon team to implement them in our next-generation products. Provide a data driven approach to HW decision making.
- Drive performance roadmap for SiMa.ai’s next-generation MLA architecture:
- Collect data on performance of various GenAI, Transformer and CNN models, identify bottlenecks and areas of improvement, research and propose concrete solutions, validate them while partnering with the HW engineers to get into the next generation SoC.
- Partner with all relevant engineering folks/teams
- To better understand and deep-dive into MLSoc related trade-off issues
- Understand and analyze the interplay of hardware and software architectures in targeted applications.
- Create technical documents and presentations to highlight the deep rooted technical issues/considerations for other engineers,
- Contribute significant and substantial technical expertise to research, scoping and solving complex problems impacting SiMa.ai MLA, while partnering with other teams/technical leads
- Lead as the primary go-to person for MLA hardware centric architecture initiatives.
- PhD or MS in electrical engineering or computer science with 14+ years of experience developing products/platforms involving hardware with a focus on optimizing for performance and power.
- At least three years of experience developing ML products that involve silicon and software.
- At least three years of experience developing performance models.
- Good programming skills in Python.
- Strong mathematical foundation in machine learning and deep learning.
- Must have co-authored internal technical presentations, research papers and disclosures/patents on MLSoC related topics (preferably published and presented technical papers at industry forums).
- Must have architected and taped-out significant and substantial ML engineering products and technical expertise to research, scoping and solving complex problems in a multidisciplinary and cross functional organization.
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