Systems Software Engineer
IrreducibleAbout the role
Come join Irreducible as we accelerate the ZK revolution by supporting web3 networks with reliable and cost-efficient proof generation. We’re a high-performance cryptography startup (with an exciting hardware twist) looking for a talented Systems Software Engineer. A more technical description of what we do is below!
About the role:
As a systems software engineer at Irreducible, you will design and implement our low-level system software stack that integrates our FPGA accelerators into cryptographic application code. This involves working on our custom device driver, fine-grained management of memory and compute resources, detailed performance profiling, and modification and instrumentation of cryptography code. Team members work closely with the FPGA and cryptography engineers to codesign the hardware-software interfaces, and with the infrastructure engineers to develop and deploy software to Irreducible’s bare metal server cluster.
Being a self-starter is essential, as there are always a variety of challenges that need to be tackled. Your work will have a direct impact on our growth and success.
Locations supported:
We’re looking for candidates who are located between the USA East Coast and Central Europe time zones. Although we’re a globally distributed company, ensuring the team works in cohesive time zones is essential to our goals. Additionally, the company plans to get together ~one week per quarter in either New York City or Europe.
Necessary Qualifications:
Advanced knowledge of Rust
A deep passion for technology, software development, and secure computing
Demonstrated ability to deliver software projects from inception to completion in a fast-pace environment
Understanding of computer architecture and data structures
Passion for performance tuning and optimization
Experience writing multi-threaded, concurrent software
Ability to think across layers of abstractions
Experienced and well-versed in Linux, version control, scripting, and build systems
Understanding of technology tradeoffs and a pragmatic approach to problem solving
Strong written and verbal communications skills
Bonus Qualifications:
Aptitude for math and computer algorithms
Understanding of cryptographic proof systems and zero-knowledge cryptography
Experience...
modifying and contributing to open-source codebases
implementing high-performance software and distributed systems
programming embedded processors and Linux kernel modules/drivers
programming GPUs or FPGAs
implementing low-level cryptographic primitives
About us (deep dive):
We're building out a high-performance, cost-efficient compute stack for advanced cryptographic proofs, specifically zk-SNARKs. Verifiable computing with zk-SNARKs is taking off as a solution to the scalability and privacy limitations that today's blockchains suffer from. A new wave of blockchain protocols that use zk-SNARKs to prove smart contract executions, such as Polygon zkEVM, Starknet, and zkSync, are already in production. We believe there is a big market opportunity to generate proofs for these networks at scale in a cost-effective way [1]. There are lots of interesting performance engineering challenges we need to solve to keep up with the maximum device throughput.
We take the approach of co-designing hardware and software systems to accelerate SNARK generation end-to-end. Our first-generation tech stack uses FPGA accelerators running custom digital logic tailor-made for our use case [2].
We also conduct cryptography research to identify computationally efficient algorithms for verifiable computing. These research efforts produced a novel cryptographic construction based on towers of binary fields called Binius [3] [4], which we are currently developing into a production-grade system.
Our team has cross-domain expertise and includes hardware designers, low-level systems software engineers, cryptography engineers, and data center specialists, several of whom worked in HFT previously.
[1] https://www.paradigm.xyz/2022/04/zk-hardware
[2] https://www.ulvetanna.io/news/fpga-architecture-for-goldilocks-ntt
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