Senior Design Verification Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Data Center Engineering Group, is one of Marvell's fastest growing business units. We focus on helping our customers with their custom designs for cloud-based AI applications as well as customers in the enterprise and carrier markets. As a member of the verification team, the candidate will be responsible for functional verification of one or more units that make up the co-processor sub-system. Handling such features as pcie/ethernet packet processing, offload protocol engines, cryptography, processor scheduling, traffic management, machine learning, etc

What You Can Expect

- In this in-office role in Westborough, MA, you’ll work day-to-day with an RTL engineer to verify their design. Their design is in Verilog; you’ll use System Verilog to debug. You’ll run simulations using Synopsys VCS or a similar program, and then debug as needed until the design meets required specifications.

- Contribute as a Verification Engineer developing the next generation of cloud, networking, and security processors. 

- Work with Architects and Designers to develop complex verification environments, learning and using the latest state-of-the-art techniques, to prove the design and architecture and discover problems and suggest improvements.

-  As a new engineer at Marvell, we value your ideas, and your work will have a direct impact to the company.  You will be given excellent opportunities to learn and grow your career deviations from the planned schedule.

What We're Looking For

To be successful in this role you must:

- Have completed a Bachelor’s Degree in Electrical Engineering or Computer Engineering and have 2 to 3 years of related professional experience OR a Master’s Degree and/or PhD in those fields.

- Your coursework must have included some analog classes, Verilog or VHDL, basic circuits, and computer architecture.

- You have used a tool like Synopsys, Cadence, or Mentor to run simulations and you can write and debug a testbench.

- Be comfortable working in a Linux environment and doing scripting with Python.

- Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely.

- Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any

Expected Base Pay Range (USD)

100,400 - 148,630, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to