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Sr. Engineer, Machine Learning Accelerator (MLA) Modeling (AI2432)
SiMa.aiSan Jose, United Statesfull_timeVerifiedPosted 7 Aug 2025
💰 $194,000/yr($140,000/yr – $194,000/yr)
About the role
Job Title: Sr. Engineer, Machine Learning Accelerator (MLA) Modeling Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office)
Job Number: AI2432 Job Description: As a pivotal member of the Platform Architecture team, you will leverage your deep understanding of computer architecture to develop coarse models for our Machine Learning Accelerator. These models will assess the power, performance, and area implications across various MLA configurations and for diverse machine learning workloads, including Large Language Models (LLMs) and Vision-Language Models (VLMs). We are seeking a highly motivated computer architecture engineer with a distinguished background in the field. Ideal candidates will possess a Master's or Ph.D. This position requires a full-time, on-site presence in our San Jose, CA office. Engineer Key Responsibilities:
Job Number: AI2432 Job Description: As a pivotal member of the Platform Architecture team, you will leverage your deep understanding of computer architecture to develop coarse models for our Machine Learning Accelerator. These models will assess the power, performance, and area implications across various MLA configurations and for diverse machine learning workloads, including Large Language Models (LLMs) and Vision-Language Models (VLMs). We are seeking a highly motivated computer architecture engineer with a distinguished background in the field. Ideal candidates will possess a Master's or Ph.D. This position requires a full-time, on-site presence in our San Jose, CA office. Engineer Key Responsibilities:
- Partnering with the Architecture team develop and maintain the performance and power analysis tool.
- Adapt the tool to analyze key performance and power drivers in SiMa.ai’s MLA architecture for relevant neural networks like ViTs.
- Coarsely model key IPs like the DMA/DRAM in the MLSoC to address performance and power issues.
- Work with the MLSOc architecture team to optimize the performance of the SiMa.ai MLA: reduce local memory requirements, increase DMA throughput and overall efficiency.
- Identify HW/SW trade-offs/enhancements and work with the compiler/tool chain team and silicon team to implement them in our next-generation products.
- Contribute to the performance roadmap for SiMa.ai’s next-generation MLA architecture.
- Research, scope, and analyze the interplay of hardware and software architectures in targeted applications.
- MS or PhD in Computer Architecture, with at least 2 years of work experience
- Strong understanding of machine learning architecture like systolic arrays.
- Background in CNN/ViT networks.
- Thorough knowledge of coding with Python and C++
- Strong mathematical foundation in machine learning and deep learning.
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