Senior | Principal HBM Design Architect

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our Opportunity Summary:

For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.

As an HBM Memory Design Engineer in the HBM architect team, you will be responsible for crafting and analyzing digital and analog circuits used in the development of memory products. This includes simulating, optimizing, and floor planning DRAM circuits. You will need to be able to evaluate Full chip or block-level functionality and provide solutions to help deliver functionally accurate design. You will work with a highly innovative and motivated design team using groundbreaking memory technologies to develop the most sophisticated HBM products. Lastly, the job level/title offered will be based on a combination of experience and education

In HBM DEG (High Bandwidth Memory - DRAM Engineering Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence). The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison. To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via). This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only. Lastly, verification and testing (validation) of HBM is the most ambitious due to the total size of the design and complexity of the functions, and in addition to craft, many innovations are needed for verification and validation of the HBM product, thereby making it uniquely exciting.

Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment, and groundbreaking technology while rapidly growing your abilities.

(Disclaimer): While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate who is motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of best-in-class engineers. In that case, we are determined to help build upon your existing foundation, while rapidly growing your individual and collaborative skills in this exciting and outstanding opportunity.

What’s Encouraged Daily:

• Possess knowledge in one or more areas such as DRAM memory array design including data path, ECC, and command control and/or high-speed clocking and interface development.

• Evaluate full chip or block-level functionality and provide solutions to ensure the delivery of a functionally correct design.

• Have a good understanding of timing/area/power/complexity trade-offs in high-speed DRAM or mixed-signal design.

• Conduct pathfinding to explore new architectures for future HBM products and make recommendations after performing highly technical feasibility analyses.

• Contribute to the development of new HBM product opportunities by assisting with the overall design, layout, and optimization of Memory, Logic, and Analog circuits.

How To Qualify:

• BSEE with 7+ years of relevant engineering experience, or, MS with 5+ years of relevant engineering experience

• Extensive knowledge of CMOS Circuit Design and Device Physics.

• Extensive knowledge of schematic entry and simulation using Finesim and/or Hspice.

• Experience with power network analysis.

• Experience with a scripting language (Python, Tcl, Perl, etc).

What Sets You Apart: