HBM Memory Core Design Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our Opportunity Summary:

For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.

As an HBM Memory Design Engineer in our Heterogeneous Integration Group(HIG), you will be responsible for crafting and analyzing digital and analog circuits used in the development of memory products. This includes simulating, optimizing and floor planning DRAM circuits. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively craft HBM products that optimize all manufacturing functions and assure the best performance, power, cost, quality, reliability, time-to-market, and customer happiness.

In HBM, we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence). The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison. To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via). This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only. Lastly, verification and testing (validation) of HBM is the most challenging due to the total size of the design and complexity of the functions, and in addition to craft, many innovations are needed for verification and validation of the HBM product, thereby making it uniquely exciting. 

Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity.

*This position will be a hybrid role located in either Allen, TX or Folsom, CA.

*The seniority level offered will be based on a combination of experience and education.

What’s Encouraged Daily:

• Contributing to the development of new HBM product opportunities by assisting with the overall design, layout, and optimization of Memory, Logic, and Analog circuits

• Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions

• Being responsible for and handling the layout process including floor-planning, placement, and routing

• Performing verification processes with modeling and simulation using industry standard simulators

• Maintaining technical expertise and provide training

• Chipping in to cross group communication to work towards standardization and group success

• Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure proper manufacturability of product

• Proactively solicit guidance from Standards, CAD, modeling, and verification groups to ensure the design quality

• Driving innovation into the future Memory generations within a dynamic work environment

How To Qualify:

• BSEE, MSEE

• Extensive knowledge of CMOS Circuit Design and Device Physics

• Familiarity with schematic entry and simulation using Finesim and/or Hspice

• Experience with power network analysis

• Extensive knowledge in verilog modeling and simulation tools

• Extensive knowledge of state machine logic/design verification techniques

• Experience with a scripting language (Python, Tc