Jobs and Careers
AL
Senior Design Verification Manager/DV Lead
Alif SemiconductorPleasanton, United Statesfull_timeVerifiedPosted 3 Mar 2023
About the role
Alif Semiconductor is revolutionizing the way secure connected AI-enabled embedded solutions are created. We are looking for motivated individuals who want to be involved in a fast-paced environment with cutting-edge technology.
Responsible for developing pre-silicon functional verification solutions for our cutting-edge microcontroller family of products.
Responsible for developing pre-silicon functional verification solutions for our cutting-edge microcontroller family of products.
Responsibilities
- Lead a team of digital verification engineers in the planning and verification of next generation micro controller products.
- Mentor verification team to derive test plan from architectural requirements and design documents.
- Execute the verification strategies of SoC, and IP cores.
- Create test testbench architecture, develop reference models, bus-functional models and drivers to verify the design requirements.
- Integrate Verification IPs from different vendors.
- Contribute to the definition of leading verification methodologies and ensure the accepted best practices are followed by the engineering team.
- Guide DV engineers to debug failures in simulation to root cause problems.
- Objectively manage projects to achieve the defined verification metrics.
Key Qualifications
- Advanced knowledge of HVL methodology like UVM.
- Proven track record of full SOC cycle from concept to tape-out to bring-up.
- Experience in taping out large SOC systems with embedded ARM processor cores.
- Hands-on verification experience of AXI Bus Fabric, APB, AHB, and AXI, based bus architecture in UVM environment.
- Create IP level module and sub-system verification plan, reusable Test Benches, test sequences, test infrastructure.
- Create UVM based coverage driven verification plans from design specifications, review and refine to achieve coverage targets.
- In-depth knowledge and experience of working with low power design, UPF integration, boot sequence, power cycle, HW/SW interaction verification.
- Knowledge of ARM low power design and power policy unit.
- Understand the details of High Efficient High performance SOC Architecture, standard SOC component like Timer, DMA, memory management schemes, low power spec, multi-processor systems, Memory Controller Sub Systems, PLL, power up and Secured Boot schemes.
- Working knowledge of basic IO protocols (SPI/Octal SPI/I2C/UART/I2S/I3C/)
- High speed I/O protocols such as Ethernet, SDIO, USB2.0, MIPI DSI/CSI/BLE
- Work closely with DV leads to improve verification flow.
- Strong experience with scripting languages like Perl and Python
- Should be a great teammate with excellent communication and problem-solving skills and the desire to seek diverse challenges.
- BSEE or MSEE with 15+ years of dedicated/hands-on DV experience in using System Verilog.
Apply for this role
Generate a tailored application kit with a matched cover letter, interview prep, and CV highlights — in under 60 seconds.
Apply Now →Generate Application KitFree account required — sign up in 30s