Digital Integrated Circuit Physical Design Engineer (Associate, Mid-Level or Senior)
BoeingAbout the role
Company:
The Boeing CompanyJob ID:
00000432560Date Posted:
2024-08-13Location:
USA - Huntington Beach, CAJob Description Qualifications:
Boeing Research & Technology is currently seeking a Digital Integrated Circuit Physical Design Engineer (Associate, Mid-Level or Senior) with experience developing complex, high-performance ASICs, FPGAs, and SoCs (e.g. custom multicore processors, digital signal processors) for military/aerospace or other safety-critical systems. This position will be located in Huntington Beach, California.
We are Boeing Research & Technology (BR&T): Boeing's global research and development team creating and implementing innovative technologies that make the impossible possible and enabling the future of aerospace. We are engineers and technicians, skilled scientists and bold innovators; Join us and put your passion, determination, and skill to work building the future! #TheFutureIsBuiltHere #ChangeTheWorld
Within BR&T, Boeing’s Solid State Electronics Development organization (SSED) performs microelectronics technology development and design for aerospace systems. We develop digital, analog, and RF Systems on Chip (SoCs) for radar, navigation, electronic warfare, communications, processing, and other electronic systems. These systems are used on Boeing airborne, terrestrial, and satellite platforms. Designs are implemented with state of the art semiconductor process technologies including CMOS, GaAs, GaN, and SiGe. SSED uses external wafer fabrication but performs design (architecture, RTL, synthesis, circuits, physical design, verification, packaging and test) in house. SSED has numerous microelectronics projects, funded both by internal Boeing customers and external Government Science and Technology (S&T) customers. SSED’s large staff of microelectronics engineers conduct research and designs microelectronics hardware in support of these projects.
Position Responsibilities:
Collaborate with the design team to understand the specifications and requirements of the IC design project.
Perform physical design tasks including floor planning, power planning, placement, clock tree synthesis, routing, and timing closure.
Utilize Cadence or Synopsys EDA tools to implement and optimize physical design aspects of the IC.
Conduct physical verification tasks such as DRC (Design Rule Check), LVS (Layout vs. Schematic), and ERC (Electrical Rule Check) to ensure design integrity and manufacturability.
Optimize power, performance, and area (PPA) metrics through various techniques such as clock gating, power gating, and voltage scaling.
Analyze and resolve timing-related issues, including setup and hold violations, and perform static timing analysis (STA) to achieve timing closure.
Stay updated with the latest advancements in physical design methodologies, tools, and technologies, and propose innovative solutions to enhance design efficiency.
Document design methodologies, guidelines, and best practices to ensure knowledge sharing within the team.
This position is expected to be 100% onsite. The selected candidate will be required to work onsite at one of the listed location options.
This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret clearance Post-Start is required.
Basic Qualifications (Required Skills/Experience):
Bachelor of Science degree from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), chemistry, physics, mathematics, data science, or computer science
1+ years of experience in the design/development of integrated circuits
Preferred Qualifications (Desired Skills/Experience):
3+ years of related work experience or an equivalent combination of education and experience
5+ years of related work experience or an equivalent combination of education and experience
Solid understanding of digital IC design concepts, physical design methodologies, and EDA tools such as Cadence or Synopsys.
Proficiency in scripting languages such as Tcl, Perl, or Python for automation and design flow enha
Apply for this role
Generate a tailored application kit with a matched cover letter, interview prep, and CV highlights — in under 60 seconds.
Apply Now →Generate Application KitFree account required — sign up in 30s