About the role
We are currently looking for an ASIC designer. You will be involved in new and existing ASIC projects working in teams.
We are looking for two different roles:
1 ASIC designer
1 ASIC designer working also with integration (around 50% on each area)
Knowledge and experience:
You have a solid background with more than 5+ years of experience in ASIC development
Used to work with complex ASIC and/or large FPGA design
Multi-clock domains
System Verilog
Good English skills, in both speech and writing
For the integration role a good experience and interest in Spyglass and Synthesis is needed.
Meritorious if you have:
Experience of systemization and architecture design
Backend work with timing constraints, timing optimization and formal verification
UVM verification
Scripting skills
Telecom