Verification Software Engineer

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > Software Engineering

General Summary:

** This position is not eligible for Qualcomm immigration sponsorship. **

Educational Requirement

BS in Electrical, Computer Science, or the equivalent

Experience Requirement

open to new graduates and individuals with a few years of experience

Qualcomm’s Modem/Chiplet Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre- and post-silicon phases.

This role focuses on content quality, validation frameworks, and system-level validation enablement, offering deep exposure to Qualcomm SoCs through bare-metal validation content, scalable automation frameworks, and complex system debug.

Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains.

Excellent Opportunity to work on cutting-edge SoCs & RF Chips across multiple product segments, including:

• Data center-class silicon
• Premium mobile and flagship platforms

Exposure to diverse system architectures, workloads, and performance/power challenges across domain. Ability to build scalable validation solutions that extend from mobile to server-grade systems

SVE Team Skill Requirements (Executive Summary)

• SoC/System Validation Expertise – End-to-end pre-silicon and post-silicon validation, bring-up, system integration, and silicon debug.
• Hardware-Software Co-Debug – Strong debugging across SoC architecture, embedded software, firmware, drivers, and hardware interfaces.
• Validation Content & Framework Development – Design scalable test content, automation frameworks,  analysis, and debug infrastructure.
• Low-Level Programming – Proficiency in C/C++, Python, Assembly, Linux, device drivers, and bare-metal software development.
• Pre-Silicon Platforms – Experience with simulation, emulation (Veloce/FPGA), RTL understanding, and validation readiness.
• Knowledge of Modem, RF or SERDES high speed interfaces , clock/power management, low-power modes, and performance architecture.
• Performance, Power & Concurrency Analysis – System-level validation of bandwidth, latency, QoS, throughput, scalability, and power-performance tradeoffs.
• AI-Driven Validation – Applying AI learning/ML to improve validation/debug and log analysis productivity.
• AI- Driven code development – Use your coding skills to guide the AI model to create consistent high quality code for drivers, test plans , debug etc
• Lab & Debug Tools – Hands-on experience with JTAG, logic analyzers, oscilloscopes, kernel debuggers, and silicon debug methodologies.
• Technical Leadership & Cross-Functional Collaboration – Work effectively across architecture, design, firmware, software, and validation teams to drive silicon quality.

🔧 Role Tracks

Modem

• Design and enhance digital baseband verification code :
  • General understanding of Modem baseband purpose and layer 1 processing (I/Q, Symbols, bits)
  • Work with Modem HW designers to create C/Python code to test HW engines
• Build infrastructure for:
  • Functional verification of the baseband HW that can be leveraged into performance tests
  • Concurrency and stress testing
• Improve framework capabilities for:
  • Reproducibility and debug turnaround
  • Performance and scalability across SKUs/platforms
  • Analyze & debug failures

RF

• Design and enhance digital baseband verification code :
  • General understanding of RF baseband (y1y2, I/Q) and IF functionality for 4/5/6G processing
  • Working understanding of RF front end and RF test equipment 
  • Work with RF  HW designers to create C/Python code to test HW engines from System Vectors
• Build infrastructure for:
  • Functional verification of the RF HW that can be leveraged into performance tests
  • Concurrency and stress testing
• Improve framework capabilities for:
  • Reproducibility and debug turnaround
  • Performance and scalability across SKUs/platforms
  • Analyze & debug failures

Digital high speed links over SERDES

• Design and enhance scalable validation frameworks for:
  • Bring-up a high-speed digital link. Basic understanding of Digital to analog