ASIC Engineering Technical Leader- STA
CiscoAbout the role
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
Meet the team:
Join the Silicon One Team at Cisco, a group at the forefront of developing Cisco's groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As a member of the team, you will contribute to defining innovative ASIC STA methodologies and creating robust flows essential for developing our complex chips.
Your Impact:
Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Design, document, and develop ASIC subsystems for release in high volume and quality. Help define the process, methods, and tools for design and implementation of complex developments.
What You’ll Do:
Oversees the definition, architecture and design of high performance ASICs
Oversees all applications and code including methodology of reusable code
Oversees code creation and determines methodology behind coding
Consults for architecture and design decisions for complex areas
Drives design solutions across the business
Creates guidelines and standards
Creates innovative verification strategies
Oversees system level verification using test benches
Ensures culture of code reviews and postmortems
Architects and designs analog/mixed-signal circuits
Reviews complex IC designs and makes recommendations for improvements
Directs the mixed-signal team to define requirements, influences packaging and hardware team to ensure specifications are met
Oversees all physical design functions bringing technical expertise to highly complex scenarios
Interfaces with vendors and design leads on complex issues
Drives different technology design rules to develop innovative packages
Minimum Qualifications:
Bachelor’s with 10 years of related experience, or Master’s with 5 years of related experience, or PhD with 2 years of related experience.
Prior experience with Integration for STA including Hyperscale and hierarchical analysis with parasitic stitching, IO budgeting, and flat parasitic extraction.
Prior experience in developing timing constraints and signing off timing on blocks/sub system in advanced process nodes
Prior experience with timing closure with various timing ECO including transition, setup, hold, noise, xtalk, and power recovery.
Prior experience with various on-chip variation including AOCV, POCV and voltage, temperature, aging-based timing derates.
Preferred skills:
Synthesis Tools: Synopsys. DC/DCG/FC
Formal Verification : Synopsys, Formality and Cadence LEC
Parasitic Extraction : Synopsys, Star-RCXT, Cadence Quantus
Static Timing Analysis & ECO: Synopsys Primetime/PTPX/Tweaker/PrimeClosure, Cadence Tempus
Scripting: TCL, Perl is required; Python is a plus
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
The starting salary range posted for this position is $210,600.00 to $305,100.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incApply for this role
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