Sr. Fellow / Fellow Processor Architect (ASIC)

Your mission

Develop the architecture of our digital processor that controls photonic integrated circuits for ai training and inference that is implemented by a third party.

Key responsibilities:

• Provide technical leadership to internal photonics, firmware, and system integration teams, as well as to the external third-party ASIC/processor design partner.
• Define and manage processor architecture milestones, aligning with overall product roadmaps and photonic IC development timelines.
• Act as the primary technical interface between internal R&D, product management, and the external implementation partner to ensure requirements are fully translated into the processor design.
• Guide less experienced engineers in digital architecture and design principles relevant to photonic systems.
• Identify architecture-level risks early, coordinate mitigation plans, and escalate critical blockers to management.
• Deliver a processor architecture optimized for high-bandwidth, low-latency control of photonic integrated circuits in AI training and inference systems.
• Ensure the design meets aggressive performance, power, and integration goals to maintain competitive advantage.
• Optimize architectural trade-offs to reduce implementation cost and time-to-market without compromising performance.
• Define complete processor architecture specifications within agreed timelines.
• Achieve first-silicon success through accurate modeling, verification strategy alignment, and close partner collaboration.
• Integrate photonic-specific control features seamlessly into the processor instruction set and memory hierarchy.
• Build up and manage team for future implementations.

Your profile

Education: Master’s degree or PhD in Electrical Engineering, Computer Engineering, or a related field; equivalent industry experience considered.

Technical Expertise

• 10+ years of experience in processor or SoC architecture definition, with proven first-silicon successes in high-performance, low-latency digital systems.
• In-depth knowledge of:
  • CPU and/or DSP microarchitecture design (pipelines, instruction set architecture, memory hierarchy).
  • High-speed digital interfaces and interconnects.
  • Hardware/software co-design principles.
  • Low-power and performance optimization techniques.
• Experience with hardware description languages (e.g., VHDL, Verilog, SystemVerilog) and architecture modeling tools (e.g., SystemC, gem5, or equivalent).
• Familiarity with AI acceleration architectures and associated compute/memory trade-offs.

Domain-Specific Knowledge (preferred but not mandatory)

• Understanding of photonic integrated circuits (PICs) and their control requirements.
• Knowledge of mixed-signal and analog/digital integration challenges.
• Experience with integrating novel hardware into AI training and inference pipelines.

Why us?

• Make growing demand in compute and sustainability go hand in hand
• Work on leading edge photonic AI acceleration technologies.
• Collaborative and innovative work environment.
• Own your work from day one and fast-track your professional growth.
• Work alongside a passionate, international, cross-functional team of experts.
• Collaborate closely with the company’s founders and core leadership team.