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Senior Design Verification Engineer

Microsoft
Mountain View, United Statesfull_timeVerifiedPosted 11 Dec 2024
💰 $250,200/yr($117,200/yr$250,200/yr)

About the role

The Artificial Intelligence Silicon Engineering team is seeking a Senior Design Verification Engineer  to deliver premium-quality designs once considered impossible.   We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner.  

 

We are looking for aSenior Design Verification Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team.  The candidate should be a self-starter who will thrive in this cutting-edge technical environment.  You will be part of the design verification team, driving many facets of high performance, high bandwidth designs. 

 

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

 

In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.

Responsibilities

In this role you will:

  • Establish yourself as an integral member of a design verification team for the development of AI components with focus on verifying functions and features. 
  • Establish yourself as an integral member of a design verification team for the development of AI components with focus on verifying functions and features. 
  • Lead a pre-silicon verification team for the development of custom Intellectual Property (IP) and Subsystem (SS) components with focus on architectural and micro-architectural based functions and features. 
  • Collaborate with the architecture and design teams to ensure the implementation meets both architectural and micro-architectural intent. 
  • Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. 
  • Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments. 
  • Apply Agile development methodologies including code reviews, sprint planning, and feature deployment. 
  • Provide technical leadership through mentorship and teamwork. 
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion. 
  • Other

Qualifications

Required Qualifications:

  • 7+ years of related technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
    • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • 6+ years of industry experience in design verification with a delivering complex Application Specific Integrated Circuits(ASIC) or System on Chip(SOC).

 

Other requirements:

  • Ability to meet Microsoft, customer and/or government security screening

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Company

Microsoft

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