Staff, CPU Architecture & Performance Research Engineer

<div class="content-intro"><p><span style="font-size: 12pt;"><strong>Please Note:</strong></span></p> <p>To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.&nbsp;</p> <p><span style="font-size: 12pt;"><strong>Advancing the World’s Technology Together</strong></span></p> <p>Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.&nbsp;</p> <p>We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.</p></div><p><strong>Staff</strong><strong>,</strong><strong> CPU Architecture &amp; Performance </strong><strong>Research </strong><strong>Engineer</strong></p> <p><strong>What You’ll Do</strong></p> <p>Architecture Research Lab&nbsp;&nbsp;is looking for&nbsp;&nbsp;Staff CPU Architecture &amp; Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions.</p> <p>You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads</p> <p><strong>&nbsp;</strong><strong>Location:</strong> Daily onsite presence at our San Jose office in alignment with our Flexible Work policy</p> <p>Job ID: 42850</p> <ul> <li>Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem).</li> <li>Build, extend, and validate architectural performance models and simulators.</li> <li>Perform CPI/IPC breakdowns and root-cause performance bottlenecks.</li> <li>Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models.</li> <li>Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces).</li> <li>Translate performance data into clear architectural recommendations.</li> <li>Work leading