Senior Technical Staff Engineer - Emulation

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

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Job Description:

Microchip’s Data Center Solutions (DCS) Business Unit offers industry-leading performance, reliability, and security for Storage Controllers, PCIe Switches, and NVMe solutions. As a Senior Technical Staff Emulation Engineer, you will provide technical leadership for our Enterprise Flash Controller product line. You will be responsible for architecting and executing emulation strategies for complex $300M+$ gate devices that power next-generation data centers and accelerators.

The ideal candidate will have a deep background in SoC emulation specifically related to Enterprise Flash Controllers, switching, and memory attachment. You will work closely with internal and external customers, as well as cross-functional engineering teams, to support both current and next-generation products.

At Microchip, we foster continuous learning in a challenging and rewarding environment. If you are looking for an opportunity to innovate and lead in a high-impact space, we’d like to hear from you!

Responsibilities:

• Develop our next generation Data Center Storage products, including enterprise class NVMe Solid State Drive (SSD) controllers and other PCIe based products
• Provide technical leadership through all phases of silicon ASIC development 
• Work with industry standard protocols such as PCIe, ONFI, AMBA AXI, SAS and DDR4/5 and third party Accelerated Verification IPs (AVIPs).
• Evaluate emulation platforms and provide recommendations.
• Build and maintain emulation platforms with design variants.
• Support emulation activities in pre and post silicon development phases.
• Staying current on the latest SOC trends and innovations and incorporating them into emulation flows.
• Develop Simulation Acceleration testbenches using Cadence Palladium flow and Support emulation bring up and post silicon debug.
• Work on Universal Verification Methodology (UVM) based testbench architecture, test plan development, simulation and coverage.
• Develop C based testcases at full chip and review of architectural and micro architecture specifications.
• Develop synthesizable Bus Functional Models (BFM) for various protocols and interfaces used in SoC design and emulation.
• Debug and root cause design, testbench and emulation platform related issues.

Requirements/Qualifications:

• Bachelor’s degree in Electrical or Computer engineering (Master’s degree preferred)
• 12.5+ years of relevant industry experience in ASIC development, emulation.
• Excellent problem solving and debugging skills
• Excellent verbal and written communication skills
• Teamwork and time management skills, setting direction, the ability to work under pressure and the desire to excel in a competit