Signal and Power Integrity - Principal Engineer / Technical Manager

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Marvell Advanced Packaging team is responsible for package design and technology development to meet the electrical, mechanical, thermal and system requirements for the next generation high performance computing (HPC), Artificial Intelligence (AI) and networking solutions. The group focuses on signal integrity, power integrity, thermal integrity, mechanical integrity, high speed signaling and complex power delivery networks (PDNs) requiring innovative and custom solutions to meet constantly evolving customer needs. Many of the new designs require multi-chip, multiple component configurations involving, but not limited to, 2.5D and 3D packages, Co-packaged copper or optics and advanced substrates. Marvell has partnered with the world's leading manufacturers to solve our customer’s most challenging designs and integrations with industry-leading packaging technologies

What You Can Expect

• Marvell is looking for an engineer with both strong technical ability, and team leadership or management experience, in semiconductor packaging or PCB development.

  You will be responsible for the following:

• SI/PI analysis of designs and optimization within 2D/2.5D/3D packages

• Interfacing with product design teams and clients for optimized floor-planning, package substrate design, and power delivery network design

• Perform wiring studies in order to determine optimal signal routing, power delivery verification and package size determination

• Training and mentoring within a growing team of Signal and Power Integrity engineers

Primary job location is Westborough, MA (Option for Burlington, VT) onsite

What We're Looking For

The ideal candidate will have an interest in hardware design and experience working on signal and power integrity verification and design optimization.  People and/or team leadership is a strong plus. A knowledge of Electrical Engineering concepts, circuit extractions and simulation, as well as design methodology and strategies is required. In addition, the candidate will possess a bachelor's degree in electrical engineering or related fields and 10+ years of related professional experience in package or PCB design, or master's degree and/or PhD in Electrical Engineering with coursework in signal integrity and power delivery and 8+ years of experience.

Marvell is looking for an expert with demonstrated success in the following areas:

• Evaluating package or PCB designs for challenging electrical requirements

• Close interaction with physical designers and IP teams to optimize electrical performance

• Executing simulation tasks for signal and power integrity sign-off

Skills needed to be successful in this role:

• Understanding of signal integrity and power integrity concepts and fundamentals

• Experience in package development, including interposer design

• People management or technical leadership

• Experience with EDA simulation tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity tools

• Familiarity with packaging technologies, materials, package substrate design rules and assembly rules

• Experience with simulation and analysis using tools like PowerSI, SIwave

• Working knowledge of circuit extractions and simulations

• Ability to work with engineers in multiple locations and geographies

• Strong communication, presentation and documentation skills

• Strong communication, presentation and documentation skills

The ideal candidate would have: 

• Board and system level signal and power integrity analysis

• Good understanding of interposer, substrate, package, PCB level design rules, ability to perform routing feasibility studies using Cadence APD or PCB editor.

• Understanding of signal and power integrity for 2.5D/3D packages including (a) CoWoS-S/R/L, (b) EMIB, (c) CPO, (d) CPC

• Ability to manage programs involving cross-functional teams. Strong interpersonal skills and willingness to learn new things are necessary along with the abi