Senior SoC Verification/Validation Engineer
Astera LabsAbout the role
<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p><strong>Job Description</strong></p> <p>We are looking for<strong> Senior SoC Verification/Validation Engineer </strong>who are passionate about bringing next-generation SoCs to life on industry-leading emulation platforms. You will play a critical role in validating complex SoCs for AI connectivity and cloud infrastructure, ensuring functionality and performance well before silicon tape-out.</p> <p><strong><span data-teams="true"><span id="content-1755655491226" class="fui-Primitive ___1omhnq5 fqtknz5 fyvcxda"></span></span></strong></p> <p><strong>Basic Responsibilities</strong></p> <ul> <li>Play a key role in developing complex SOCs for AI connectivity and cloud infrastructures </li> <li>Bring up and validate high-speed serial interfaces such as PCIe, Ethernet and UALink, and overall SoC functionality </li> <li>Collaborate closely with Architecture, Design, Verification, and SW/FW teams to define and execute functional/performance validation plans</li> <li>Develop C/C++ FW and tests to validate and execute all test plan items </li> <li>Build tools and methodologies to validate and debug all HW and SW/FW issues on the emulation platform</li> </ul> <p><strong>Required Qualification</strong></p> <ul> <li>BS/MS in Electrical Engineering, Computer Engineering or related field.</li> <li>5+ years of hands-on experience in pre-silicon verification/v
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