Principal Engineer, TCAD Modeling

Advancing the World’s Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. 

We believe that innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

What You’ll Do

We are looking for experienced techologists who will independently research and explore future logic technology paths, capabilities, and applications through design/system-technology optimization.

The candidate will be a key technical member of the Logic Pathfinding Lab, part of the Samsung Semiconductor Inc (SSI) in San Jose.  He or she will join a team of experts in researching and evaluating advanced technology options, and assisting in knowledge / technology transfer to the Samsung Logic Technology Development (TD) in Korea. The successful candidate will be responsible for researching and evaluating new device architectures, materials, and integration schemes through chip design metrics to meet the need of sub-5nm technology nodes. 

The candidate should have strong background on block level PPA analysis and standard cell library generation. The candidate should have excellent communication skills, and be able to collaborate with and guide multiple organizations, including research consortia, to develop internal benchmarking needed in developing a technology roadmap

Location: Hybrid, working onsite at our San Jose, CA headquarters 3 days a week, with the flexibility to work remotely the remainder of your time the remainder of your time. 

Job ID: 41461

• Develop and analyze new CMOS and beyond-CMOS device architectures, including the required materials and integrations schemes. 
• Develop internal benchmarking capability based on available data, modeling, and/or learnings from multiple sources, and create assessments to share with internal R&D team.
• Develop realistic device-level PPAC (power, performance, area, and cost) analysis for new technology options.

What You Bring
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• PhD in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science and Engineering or related fields and 15+ years of industry experience.   
• Conceptualize, design, and assess new CMOS device architectures and logic structures involving new device materials, and process integration.
• Hands-on experience and understanding of the benefits and limitations of EDA tools in device and process modeling.
• Expertise in applying Machine Learning algorithms and approaches to accelerate and improve effectiveness of TCAD modeling.
• Deep knowledge of device physics for 3D logic structures, including emerging beyond-CMOS devices.
• Develop speculative integration flows and process assumptions, and assess risks.
• Deep understanding of requirements and design windows for applications including low-power, high-performance, embedded memory.
• Expertise in design and optimizations of advanced logic and memory standard cells.
• Demonstrated experience and expertise in developing new CMOS device architectures is preferred.
• Understanding of FEOL, MOL, and BEOL process flows is preferred.
• Experience in designing logic test structures and using process emulators is preferred.
• Experience in device reliability assessment is preferred.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

What We Offer
The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance. 

This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers