Jobs and Careers
ME
ASIC Engineer - Infra Silicon Enablement
MetaUnited Statesfull_timeVerifiedPosted 16 Oct 2024
💰 $249,000/yr($173,000/yr – $249,000/yr)
About the role
Meta is hiring ASIC Engineers within the Infrastructure organization. We are looking for individuals with experience in the entire Silicon Lifecycle to build and scale silicon for data center applications.
As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.ASIC Engineer - Infra Silicon Enablement Responsibilities
As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.ASIC Engineer - Infra Silicon Enablement Responsibilities
- Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions - from early architecture and design inputs, pre-silicon validation, bring-up and post-silicon characterization and deployment in fleet.
- Create/develop validation and automation tool sets targeted at silicon validation and productization - inclusive of, but not limited to silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center deployments.
- Understand production system use cases to improve validation.
- Provide feedback into next generation architecture and design with insights from the production fleet.
- Leverage deep technical skill set in ASIC design, bare-metal embedded FW development, and/or complex test development to build & execute comprehensive pre and post-silicon test plans. Develop related functional, stress and performance tests.
- Root-cause, resolve and remediate issues with silicon across the product lifecycle.
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- 8+ years of experience in hands-on SW/FW/HW Engineering / ASIC development cycles.
- 4+ years of knowledge/understanding of silicon/server/systems architecture and components.
- 4+ years of experience with troubleshooting, debug and analytics.
- Experience in Python, C/C++ and/or similar languages (data structures, algorithms, and OOP).
- Experience working with internal and external partners for ASIC and/or systems development.
- Experience developing/ using validation infrastructure across the full silicon lifecycle.
- Experience in ASIC Design, Development or Validation (Silicon bringup, validation, emulation, characterization, etc).
- Experience with Silicon Lifecycle for Data center applications like Video, AI/ML and Networking.
- Experience with Verilog/System Verilog preferred.
- Experience with Linux systems and server systems management.
- Experience with some of the following modules/domains: PCIe, Networking, Flash, Memory, CPU, GPU, DRAM (LP/DDR4/5 and/or HBM).
- Experience with some of the following modules/domains: Serdes, characterization, emulation, logic design, microarchitecture, validation, embedded programming.
- Experience with performance optimization of algorithms.
- Experience in debugging tools for systems-on-chip (SoCs).
- Knowledge of how embedded systems work, including common bus protocols, such as I2C, SPI, USB, and/or PCIe.
- Experience with revision control systems like Mercurial(Hg), Git or SVN.
- Experience working across and building relationships with cross-functional teams - architecture, design, model, emulation, validation and systems teams.
Apply for this role
Generate a tailored application kit with a matched cover letter, interview prep, and CV highlights — in under 60 seconds.
Apply Now →Generate Application KitFree account required — sign up in 30s