Analog IC Layout Engineer (Bay Area)

Lightmatter builds chips for artificial intelligence computing. Our architecture leverages the unique properties of light to enable fast and efficient inference and training engines. If you're a collaborative engineer or scientist who has a passion for innovation, solving challenging technical problems, and doing impactful work...work like building the world's first optical computers, consider joining the team at Lightmatter!

In this role, you will be a key member of the analog team architecting the world's first photonic computers. This is fundamentally an interdisciplinary team, and outside-the-box thinking is the daily norm. You will be responsible for designing layouts for mixed-signal, and analog circuits, reviewing and analyzing floorplans and circuits with circuit designers, and running a complete set of design verification tools available for AMS blocks. Using advanced CAD tools and your mask design knowledge you’ll deliver correct and robust layouts that meet stringent matching performance, area, and power requirements. In addition, you’ll be maintaining and supporting the CAD environments for the analog team.

Responsibilities

• Collaborate with circuit designers to define floorplan and layout requirements from block-level to top-level
• Layout design of analog circuit blocks with attention to matching, parasitics, noise isolation, and other concepts such as IR drop and reliability
• Run a complete set of design verification tools available on analog/mixed-signal blocks
• Interpret LVS, DRC, and ERC reports to find the fastest way to complete the layout
• Maintain CAD design environment and support process design kits
• Develop and maintain scripts for EDA automation
• Maintain revision control environment of Lightmatter’s analog design database

*Must be able to be on-site in our Mountain View, CA office

Requirements

• Minimum BS with 8+ years of experience
• Experience with analog and mixed-signal layouts for deep submicron CMOS circuits
• High-level proficiency in interpretation of DRC, ERC, LVS, etc. reports
• Proficiency in using industry-standard design software, including Cadence Virtuoso, Cadence/Calibre DRC, LVS tools
• Experience in maintaining design kits including verification decks (DRC, LVS, ERC, and EXT)
• Experience in revision control software such as Cliosoft SOS and git
• Experience in pCell and Skill code development is a plus
• Experience in advanced FinFET process nodes is a plus
• Excellent communication skills and ability to work with remote teams
• Successful track record in delivering analog/mixed-signal layouts while meeting tight schedules

Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• 401k matching
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Short Term & Long Term Disability
• Training & Development
• Flexible, hybrid workplace model
• Stock Option Plan

Base Compensation Range: $130,000 to $160,000. In accordance with the Colorado, California and New York law, the range provided is Lightmatter's reasonable estimate of the compensation for this role. Actual pay will be based on several factors including work experience, location and education.

Lightmatter recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.

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