Staff Engineer, High-Speed I/O Analog-Mixed Circuit

<div class="content-intro"><p><span style="font-size: 12pt;"><strong>Please Note:</strong></span></p> <p>To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.&nbsp;</p> <p><span style="font-size: 12pt;"><strong>Advancing the World’s Technology Together</strong></span></p> <p>Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.&nbsp;</p> <p>We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.</p></div><p>Memory IO Lab is part of Samsung’s Memory Business Unit, the industry's all-time DRAM and NAND Flash leader both in technology as well as in volume. Memory IO’s vision is to provide memory interface technology solutions which can be adopted in DDR, LPDDR, GDDR, and more. We are an integral part of Samsung’s paramount R&amp;D innovation engine. We work closely with cross-disciplinary development teams to bring feature innovation to product roadmaps.</p> <p>Come and join the team that is providing the next generation IO tech solutions to support emerging machine learning applications, data analytics, and edge computing.</p> <p><strong>Location:</strong> Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy</p> <p><strong>What You'll Do</strong></p> <ul> <li>Hands on in analog circuit design, which includes circuit design, running simulations to confirm functionality and performance, and work with verification team to verify design. The mixed-signal designs will include but are not limited to the following: high-speed data converters, PLL, and SERDES.</li> <li>Guide layout floor-planning block and top level to optimize the overall performance; supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary.</li> <li>Ownership of circuit and system specifications.</li> <li>Simulate designs with state-of-the-art CAD tools.</li> <li>Document designs and simulation results.</li> </ul> <p><strong>What You Bring</strong></p> <ul> <li>BS 10+ years experience, MS 8+years of experience, PhD 5+ years experience in Electrical Engineering, Com