Technical Lead, Analog Mixed Signal IP
GoogleAbout the role
Minimum qualifications:
- Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
- 8 years of experience in Analog Mixed Signal IP design in the area of High Speed IP such as LPDDR, PCIe, or USB.
- Experience in execution management of AMS IP.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering or a related field.
- Experience in development of PLLs, Oscillators, along with High speed Parallel and Serial IOs.
- Experience in LPDDR5 and PCIGen5 development.
About the job
You will engage multiple Analog Mixed Signal (AMS) IP vendors (such as PLLs, Serial IO, and LPDDRs) in process technology. In this role, you will evaluate risks associated with IP, including quality, silicon health, integration, delivery timeline management, and issue resolution. You will hold regular engagements with external vendors and internal leads to develop current and future requests, availability, and timelines.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
You will engage multiple Analog Mixed Signal (AMS) IP vendors (such as PLLs, Serial IO, and LPDDRs) in process technology. In this role, you will evaluate risks associated with IP, including quality, silicon health, integration, delivery timeline management, and issue resolution. You will hold regular engagements with external vendors and internal leads to develop current and future requests, availability, and timelines.
Responsibilities
- Lead external IP selection for our SoCs.
- Track internal IP development progress, resolve issues, and create mitigation plans.
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