Job Details:

Job Description: 

Intel Integrated Photonics Solutions (IPS) is at the forefront of silicon photonics integration and commercialization. Since announcing the world's first hybrid silicon laser nearly a decade ago, our team continues to lead the industry with cutting-edge technology and efficient, scalable high-volume manufacturing. Our dedication to advanced development ensures that Intel Silicon Photonics continues to drive future data center and advanced AI datacenter bandwidth growth with smaller form factors, co-packaging and higher speeds from 400G to 1.6T+ and beyond. We are looking for great talent to accelerate this journey so if you are interested in joining our leading organization then we want to hear from you.

Intel's IPS is currently seeking a Senior Photonics Design Engineer focusing on passive design with experience in the development of Photonic integrated circuits and a track record of design innovation.

As a Senior Photonics Design Engineer your responsibilities will include but are not limited to:

• To present designs from initial concept to customer delivery is required. You will have the opportunity to contribute to product architectures, own the design of passive silicon photonic components including  MMI’s, Echelle gratings, directional couplers, splitters, tapers, output couplers, polarization splitter rotators, MZI’s, filters, ring resonators, interleavers, coupled-ring optical waveguides (CROW’s)
• Defines and drives photonics components development and understands and influences the architecture of photonics integrated circuits.
• Performs tolerance analysis and optimizes components for performance, power, area, and reliability.
• Drives overall test chip execution and coordination including chip design, layout, tape-out, test, and validation.
• Analyzes test data from characterizations, identifies performance gaps, and drives improvement paths.
• Develops and implements photonics components and system modeling methodologies and proposes and implements new test methodologies.
• Conducts research in novel photonics components and technologies, defines next generation components architectures, and initiates and drives IP development programs.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Ph.D. in Electrical Engineering, Physics, Applied Physics, Optical Physics, Optical Communications, Optical Science or similar discipline with 4+ years relevant experience
• 4+ years' experience in the following:  
  • Designing, stimulating, and testing passive or actively controlled silicon photonic components for complex PIC's, such as optical couplers, wavelength mux's / demux's, higher-order filters, ring resonators, polarization splitters or combiners, MZI's, reflection gratings, or other material systems and devices.
  • Optical design and simulation tools such as Lumerical (FDTD, MODE, DEVICE, Interconnect), RSoft, Tidy3D, Harold-Photon Design, or numerical simulation tools such as Matlab or python.
• 3+ years of experience in development of silicon photonics ICs from concept to high volume manufacturing
• Experience contributing to or leading a PIC tapeout such as the PIC architecture, component design, or layout
• Exposure to standard photonic test methodologies and equipment such as optical spectrum analyzers, tunable lasers, optical backscatter reflectometers, optical vector analyzers, fiber or free-space coupling.
• PIC test data analysis and design optimization including using statistical analysis using tools such as JMP or statistical libraries in matlab or python
• Familiarity with layout tools such as Candence and KLayout

 Preferred Qualifications: 

• Exposure in state-of-the-art PIC optical coupling solution
• Experience with passive component design in a silicon nitride platform
• Experience with optical circuit-level simulations, Monte Carlo analysis, link budget analysis
• Experience with inverse design