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Sr. Principal Engineer, High Speed Interfaces Architecture and Design (AI2411)

San Jose, United Statesfull_timeVerifiedPosted 5 Dec 2025

💰 $317,200/yr($240,000/yr – $317,200/yr)

About the role

Job Title: Sr. Principal Engineer, High Speed Interfaces Architecture and Design Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office) Job ID: AI2411 Description: As a SoC Architect, you will develop the architectural requirements of the high speed interfaces like PCIe, Ethernet, USB and UCIe for SiMa Machine Learning SOC and Chiplet products. Your responsibilities will include requirement definition, IP selection, specifying IP configuration and specifying HW/SW interface. The role will also require working closely with the HW engineers on RTL specification, IP integration, verification planning, silicon bringup and board bringup. This means working very closely with the business team, Silicon Design/DV/PD teams, Silicon validation team, Systems HW team and SW team. The role may require hands-on RTL coding for design exploration or prototyping purposes. Areas of Focus:

SoC architecture definition of high speed interfaces, including PCIe, Ethernet, USB and UCIe.
Work with Business team to specify SOC requirement.
Work with Silicon design team on IP selection and configuration.
Work with HW systems team on specifying PCB level requirements.
Work with SW team on specifying the HW/SW interface and Driver requirements.
Work with the verification and emulation teams.
Help with chip validation, bringup, and characterization.

Key Requirements:

Master’s degree in electrical engineering, computer engineering, or a related field.
15+ years professional experience as a SoC Architect, SOC design engineer, hardware engineer, or related position.
Experience must include extensive work on PCIe system level definition, both EP mode and RC mode.
Experience must include hands on SOC architecture specification, IP selection, HW design, verification, and emulation of high speed interfaces like PCIe, Ethernet and USB.
Good understanding of the PCIe, Ethernet and USB protocols is required.
Good experience of working with SW teams on PCIe/Ethernet/USB driver development and debug is required.
RTL design experience is highly desired.
Familiarity of UCIe interface and Chiplet architecture is highly desired.

Personal attributes: Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills. The annual salary for this position ranges from $240,000 - $317,200. The actual annual salary paid for this position will be based on several factors, including but not limited to, skills, prior experiences, qualifications, expertise, work location, total target compensation, training, company needs, and current market demands. The annual salary range for this position is subject to change and may be adjusted in the future. EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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Company

SiMa.ai

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